Posted 19 months ago
Staff Design Verification Engineer
@ Talentlab
Toronto, Ontario
Overview
Talentlab is hiring a Staff Design Verification Engineer for a client in digital data communication infrastructure. The role verifies DSPs built on high-speed mixed-signal PHYs such as PCIe and Ethernet, owning the full verification lifecycle through tape-out sign-off. It is hybrid in Ontario, preferably near the GTA or Ottawa, and requires at least 9 years of ASIC verification experience.
Responsibilities:
- Architect and verify DSPs using high-speed mixed-signal PHYs such as PCIe and Ethernet
- Build scalable UVM testbench components for RTL and firmware
- Own the verification lifecycle from plans through tape-out sign-off
- Collaborate with design team to define verification requirements
- Mentor junior engineers
Requirements summary:
- Bachelor's or Master's in computer science, electrical engineering or related discipline
- Minimum 9 years of ASIC design verification experience
- Hands-on experience building reusable testbenches with advanced debugging
- Proficiency in SystemVerilog and UVM
- Familiarity with leading EDA tools and digital verification methodologies
- Hybrid role in Ontario, preferably near GTA or Ottawa
Tools & skills
Source and dates
Source type not verified · cats
- Employer posting date
- 2025-04-08
- First seen by our source
- 2026-10-15
- Source record updated
- 2026-11-05
These dates describe the source record, not a live verification that the employer is still hiring. Check the original posting.
Job details
| Seniority | Senior |
| Department | Engineering |
| Experience | 9+ years |
| Work setting | Office |
| Position | Mostly sitting |
| Physical demands | physical low · computer high |
| Languages | English |
| Education | Bachelor’s degree (required), Master’s degree (required) |
| Fields of study | Computer Science, Electrical Engineering |
Summary and details written by AI from the posting; the employer’s posting is the authority.
Talentlab
| Field | Value |
|---|---|
| Open jobs on Jobsy | 26 |
Staff Design Verification Engineer
Our client accelerates the future of digital innovation by powering mission-critical data communication—supporting everything from AI to seamless video streaming to the metaverse. Their technology fuels advancements across data-intensive industries including data centers, storage, networking, AI, 5G infrastructure, and autonomous vehicles. Known for their innovation and reliability, they partner with industry leaders to shape the next generation of digital products.
What You’ll Do
Architect, design, and verify DSPs using high-speed mixed-signal PHYs such as PCIe and Ethernet.
Contribute to protocol development across various new variants—roles available across multiple focus areas.
Build scalable UVM testbench components for verifying complex RTL and firmware functionality.
Demonstrate in-depth understanding of SerDes and DSP cores; write test cases to optimize component control.
Own the full verification lifecycle—from creating and reviewing verification plans to implementation and sign-off for tape-out.
Collaborate with the design team to define verification requirements and scope of key features.
Mentor junior engineers and contribute to a culture of technical excellence.
What You’ll Need
Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related discipline.
Minimum of 9 years of ASIC design verification experience.
Strong hands-on experience building reusable testbenches with advanced debugging expertise.
Proficiency in SystemVerilog and UVM.
Familiarity with leading EDA tools and methodologies used in digital verification.
This is a hybrid role based in Ontario, with a preference for candidates located near the GTA or Ottawa.
Bonus Points For
Experience with SerDes.
Knowledge of Ethernet and/or PCIe protocols.
Familiarity with CMIS standards.
Understanding of protocols such as I2C, SPI, USB, NVMe, APB, AHB, etc.
Experience working with RISC-V microcontrollers.
Please reach out to [email protected] with your resume if you're a fit for the position and interested in learning more.
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