IC design Implementation and SignOff Architect, (STA SignOff)

@ Cadence

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Canada

Full-time15+ years experience

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SIGNALS

Overview

Cadence is hiring an IC design implementation and signoff architect to lead customer and partner engagements for its timing signoff portfolio on advanced nodes. The role drives adoption of Cadence signoff and AgenticAI features, works with R&D on tool enhancements, and represents Cadence at industry forums. The posting asks for 15+ years of experience and offers incentive compensation with a salary range of $154,000 to $286,000 for Washington.

Responsibilities:

Lead technical engagements with customers and partners on Cadence signoff tools
Work with design teams to meet customer success metrics on advanced nodes
Drive benchmarks, flow optimizations and timing closure methodologies
Influence tool enhancements with R&D and Product Engineering
Represent Cadence at industry forums and author technical papers

Requirements summary:

15+ years of IC design implementation and signoff experience
Deep expertise in advanced node STA and ECOs (3nm and below)
Strong scripting in Tcl, Python and Perl
Proven track record leading technical teams at executive levels
BS or MS in Electrical Engineering, Computer Engineering or related field

Tools & skills

Tempus Certus QRC

Benefits mentioned

DentalVisionRetirement plan

Source and dates

Employer career site / ATS feed · workday

Employer posting date: 2026-11-01
First seen by our source: 2026-10-14
Source record updated: 2026-11-04

These dates describe the source record, not a live verification that the employer is still hiring. Check the original posting.

Job details

Seniority	Senior
Department	Engineering
Experience	15+ years
Hours per week	40 (estimated)
Travel	air: moderate
Work setting	Office, Client sites
Position	Mostly sitting
Physical demands	physical low · computer high
Languages	English
Encouraged to apply	People with disabilities
Education	Bachelor’s degree (required), Master’s degree (required)
Fields of study	Electrical Engineering, Computer Engineering
Perks mentioned	Generous paid time off, Retirement plan, Performance bonus, Stock or equity

Summary and details written by AI from the posting; the employer’s posting is the authority.

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Cadence

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Field	Value
Open jobs on Jobsy	13

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Key Responsibilities

Technical Expertise: Lead technical engagements with customers and partners to drive & adoption of Cadence signoff portfolio. Work closely with design teams to meet customer success metrics, guide adoption of Cadence’s timing signoff & closure and AgenticAI features across advanced nodes (5nm and below).
Cross-Functional Collaboration: Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
Innovation & Enablement: Drive complex benchmarks, flow optimizations, and deployment of cutting-edge methodologies for timing signoff & closure, STA, IR Drop, and power/timing closure.
Thought Leadership: Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.

Requirements

15+ years of experience in IC design implementation and signoff, with demonstrated success in managing large-scale technical programs.
Deep expertise in digital design fundamentals, advanced node STA & ECOs (3nm and below), and EDA tool ecosystems.
Core timing signoff expertise, advanced node STA, UPF & constraints debugging, hierarchical & 3DIC design STA and closure solutions
Proven track record of leading technical teams and driving customer success at executive levels.
Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
Excellent communication, negotiation, and leadership skills with the ability to influence internal and external stakeholders.
Prior experience with Cadence tools (Tempus, Certus, QRC) and competitive solutions highly desirable.
BS/MS in Electrical Engineering, Computer Engineering, or related field

The annual salary range for Washington is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.