Candidates need a Bachelor's degree in electrical, computer engineering or computer science, plus knowledge of verification methodologies, metric driven verification, UVM, SystemVerilog assertions and the digital design flow. A Master's degree, UVM coding experience, scripting skills and protocol knowledge such as PCIe, USB or Ethernet are preferred.
5+ YOECandidates need at least 5 years of CMOS SerDes or high-speed I/O IC development, a thorough understanding of jitter and signal equalization, and an MS or PhD in electrical engineering. Strong problem-solving, communication and teamwork skills are also required.
15+ YOECandidates need 15+ years of IC design implementation and signoff experience, deep advanced-node STA and ECO skills, and strong scripting in Tcl, Python or Perl. A BS or MS in electrical or computer engineering is required.
Citoyen canadien ou résident permanent; Inscrit en programme de maîtrise ou de baccalauréat en génie électrique; Excellentes compétences en résolution de problèmes et aptitude en analogique
Problem solving, Communication skills, Work in teams, Electrical engineering
Candidates need an engineering degree in electrical, computer or computer science, plus understanding of verification methodologies such as UVM and metric-driven verification. Strong problem-solving skills, English communication and experience with SystemVerilog assertions are required.
Solide programmation en C/C++ et Python; Compréhension des principes de communication filaire; Connaissance des circuits mixtes et du traitement numérique du signal
Firmware, Work independently, Leadership, C, C++, Python
Candidates need a BSEE or MSEE, prior experience in analog CAD support, and a strong understanding of circuit and layout design. Excellent communication, presentation and customer service skills are also required.
Programmation solide en C/C++ et Python; Connaissance des communications filaires; Connaissance de la conception de circuits mixtes et du traitement numérique du signal
Firmware, Work independently, Leadership, C, C++, Python
7+ YOECandidates need an MSEE and more than 7 years of experience in analog or digital IC design or verification, or in silicon fabrication quality. Analog IC design, defect analysis methods such as RCA, 5-Why and 8D, and strong communication and teamwork skills are valued.
ISO 9001, Quality assurance, Communication skills, Teamwork, Root cause analysis, Electronics
Programmation solide en C/C++ et Python; Connaissance des communications filaires; Connaissance de la conception de circuits mixtes et du traitement numérique du signal
Firmware, Work independently, Leadership, C, C++, Python
Candidates need an engineering degree in electrical, computer or computer science, plus understanding of verification methodologies such as UVM and metric-driven verification. Strong problem-solving skills, English communication and experience with SystemVerilog assertions are required.
5+ YOECandidates need at least 5 years of CMOS SerDes or high-speed I/O experience, a strong grasp of jitter and signal equalization, and proficiency with circuit simulation CAD tools. An MS or PhD in EE is required.
Candidates need strong mathematical and linear systems skills, deep communication systems knowledge, and strong coding for simulation and data analysis. A PhD in a mathematical or physical science is likely expected.
Detect bottlenecks, Communication skills, Data analysis, Signal processing, Sales