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Posted 3 months ago

Principal Analog Design Engineer

@ Celero Communications, Inc.

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Ottawa, Ontario

5+ years experience
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SIGNALS

Overview

Celero Communications, Inc. is hiring a Principal Analog Design Engineer to architect and design high-performance analog and mixed-signal circuits for next-generation optical transceivers and AI interconnect. The role covers broadband amplifiers, clock generation, fundamental analog blocks, silicon bring-up and debug. Locations are Irvine, San Jose, Vancouver and Ottawa.

Responsibilities:

  • Design high-speed analog and mixed-signal circuits for transceivers
  • Develop clock generation and fundamental analog blocks
  • Supervise analog layouts in advanced process nodes
  • Perform silicon bring-up, debug and support
  • Write circuit specifications and documentation

Requirements summary:

  • Master's or PhD in electrical engineering or related field
  • 5+ years of analog design experience
  • Experience with Virtuoso, Spectre, ADE and post-layout extraction
  • Advanced CMOS verification experience
  • Strong communication and documentation skills

Tools & skills

VirtuosoSpectreADEEMXMomentumHFSS

Benefits mentioned

Vision
Source and dates

Employer career site / ATS feed · greenhouse

Employer posting date
2026-08-17
First seen by our source
2026-10-08
Source record updated
2026-10-16

These dates describe the source record, not a live verification that the employer is still hiring. Check the original posting.

Job details

SenioritySenior
DepartmentEngineering
Experience5+ years
Work settingOffice, Laboratory
PositionMostly sitting
Physical demandsphysical low · computer high
LanguagesEnglish
EducationMaster’s degree (required), Doctorate (preferred)
Fields of studyElectrical Engineering

Summary and details written by AI from the posting; the employer’s posting is the authority.

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Celero Communications, Inc.

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FieldValue
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Job description

Are you an Analog Design Engineer passionate about building the high-speed interconnect technology powering the next generation of AI? Join our fast-growing semiconductor startup and help develop disruptive mixed-signal solutions that enable tomorrow's AI infrastructure. We are seeking experienced Analog Design Engineers to architect, design, and deliver high-performance analog and mixed-signal circuits for next-generation transceivers and other critical high-speed functions. This is an opportunity to work alongside a world-class engineering team, tackle challenging design problems in advanced process technologies, and make a direct impact on innovative products from architecture through silicon.

Locations: Irvine, CA (HQ) | San Jose, CA | Vancouver, BC | Ottawa, ON

What You Will Do:
• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver
• Design of custom passive components, from concept to silicon implementation
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation
• Silicon bring-up, debug and support
• Team communication and documentation

What You Will Bring:
• Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience
• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must
• Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
• Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design
• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
• Strong communication and documentation skills

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