10+ YOECandidates need a master's or PhD in electrical or computer engineering, 10+ years of digital ASIC design, and strong Verilog or SystemVerilog skills. Knowledge of DSP, high-speed SerDes, mixed-signal or optical communications is also required.
Candidates need a bachelor's or master's degree in an electrical, computer or related engineering field, or equivalent experience, plus hands-on post-silicon validation or silicon bring-up experience. Knowledge of high-speed protocols such as PCIe and Ethernet, strong Python skills and excellent communication are also required.
10+ YOECandidates need a master's or PhD in electrical engineering, optical communications, photonics or a related field, plus 10+ years in coherent optical or high-speed communication systems. Hands-on experience with coherent DSP verification, optical test equipment and Python, MATLAB or C is required.
8+ YOECandidates need 8+ years of post-silicon validation or chip bring-up experience, a degree in electrical or computer engineering or computer science, and strong Python skills. Hands-on use of lab instruments and knowledge of high-speed interfaces such as PCIe and Ethernet are required.
10+ YOECandidates need 10+ years of hands-on analog and mixed-signal layout experience, including advanced FinFET nodes and a record of owning major IP layout macros. They must know verification tools such as Calibre and Pegasus, device physics and layout-dependent effects, and be able to work with international and remote teams.
5+ YOECandidates need a Master's or PhD in electrical engineering or a related field with 5+ years of analog design experience. They need strong analog fundamentals, hands-on use of Virtuoso, Spectre and post-layout extraction tools, and good communication skills.
5+ YOECandidates need a Master's or PhD in electrical engineering or a related field with 5+ years of analog design experience. They need strong analog fundamentals, hands-on use of Virtuoso, Spectre and post-layout extraction tools, and good communication skills.
2+ YOECandidates need a strong background in digital signal processing, digital communications and fiber-optic systems, plus a Master's or PhD in electrical engineering, physics or mathematics. Two or more years of industry experience and programming in C/C++, Python or MATLAB are preferred.
Candidates need a strong background in coding theory, digital communications and error correction, plus experience with forward error correction for communication systems. A master's or PhD in a related field and programming skills in C/C++, Python or MATLAB are preferred.