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Lead Physical Design Engineer, Place & Route

@ AMD, Inc.

Markham, Ontario

Full-time
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SIGNALS

Overview

AMD is hiring a Lead Physical Design Engineer for its GPU Technologies and Engineering team to lead place-and-route execution from floorplanning through signoff on complex AI and graphics designs. The role provides technical leadership, drives timing, congestion and power closure, and partners with architecture and product teams. It is a full-time position with no location, schedule or pay stated.

Responsibilities:

  • Lead place-and-route execution from floorplanning through signoff
  • Drive timing, congestion and power closure on complex designs
  • Develop floorplanning, placement, clock tree and routing strategies
  • Perform timing analysis, parasitic extraction and power integrity analysis
  • Execute physical verification and signoff, including ERC and LVS

Requirements summary:

  • Deep place-and-route methodology experience on complex designs
  • Experience with ASIC physical design and advanced-node implementation
  • Proficiency with Synopsys Fusion Compiler, Cadence and Siemens EDA
  • Scripting in TCL, Perl or Shell
  • Bachelor's or master's degree in electrical, computer or related engineering preferred

Tools & skills

Source and dates

Employer career site / ATS feed · icims

Employer posting date
2026-09-30
First seen by our source
2026-10-14
Source record updated
2026-10-21

These dates describe the source record, not a live verification that the employer is still hiring. Check the original posting.

Job details

SeniorityLead
DepartmentEngineering
Hours per week40 (estimated)
Travelair: none · ground: none
Work settingOffice
PositionMostly sitting
Physical demandsphysical low · computer high
EducationBachelor’s degree (preferred), Master’s degree (preferred)
Fields of studyElectrical Engineering, Computer Engineering

Summary and details written by AI from the posting; the employer’s posting is the authority.

AMD, Inc.

FieldValue
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Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

Responsibilities

THE ROLE:

Join the GPU Technologies and Engineering team developing leading-edge AI and high-performance computing products on advanced process technologies. As a Senior Physical Design Engineer, you will lead physical implementation activities for complex designs, driving place-and-route execution from floorplanning through signoff. You will provide technical leadership throughout the implementation process, driving timing and congestion closure, ensuring design quality, and resolving challenging physical design issues. This role offers broad ownership, significant technical impact, and the opportunity to help deliver some of AMD's most advanced AI and graphics products.

THE PERSON:

You are a hands-on physical design engineer with deep expertise in place-and-route and physical implementation. You excel at solving complex design challenges, driving implementation quality, and bringing difficult designs to closure. You are comfortable providing technical direction, identifying risks early, and guiding implementation efforts across complex projects. The ideal candidate combines strong technical depth, sound engineering judgment, and a passion for delivering high-performance silicon.

KEY RESPONSIBLITIES:

  • Lead place-and-route execution from floorplanning through signoff.
  • Drive timing, congestion, and power closure for complex designs.
  • Develop and optimize floorplanning, placement, clock tree, and routing strategies.
  • Identify and resolve critical physical design and implementation issues.
  • Perform timing analysis, parasitic extraction, and power integrity analysis.
  • Execute physical verification and signoff activities, including ERC and LVS.
  • Provide technical guidance and drive implementation quality across design activities.
  • Partner with architecture, design, integration, and product engineering teams to deliver successful silicon.
  • Enhance physical design methodologies, automation, and implementation flows.

PREFERRED EXPERIENCE:

  • Experience with ASIC physical design and implementation flows.
  • Strong expertise in place-and-route methodologies for complex designs.
  • Experience with floorplanning, placement, clock tree synthesis, routing, and timing closure.
  • Experience resolving timing, congestion, power, and signal integrity challenges.
  • Experience with physical verification and signoff methodologies, including ERC and LVS.
  • Experience with advanced-node and high-speed design implementations.
  • Proficiency with Synopsys Fusion Compiler, Cadence, and Siemens EDA tools.
  • Experience with TCL, Perl, or Shell scripting for design automation and flow development.
  • Experience providing technical leadership across physical design activities.

ACADEMIC CREDENTIALS:

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field preferred.

#LI-LC3

Qualifications

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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