“Synopsys Fusion Compiler” jobs in Canada

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• 17d

  Sr. Staff Physical Design Engineer

  Vancouver, BC

  Full Time

  AM

  Advanced Micro Devices, Inc

  AMD needs candidates with strong physical design experience for high-performance semiconductors, including timing closure and signoff. Candidates should know tools such as ICC2, Fusion Compiler, PrimeTime, Calibre and Innovus, and be proficient in Python and TCL.

  Synopsys ICC2, Synopsys ICC, Fusion Compiler, PrimeTime, StarRC, Mentor Graphics Calibre

  28d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  28d

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need deep experience with place-and-route and physical design on complex or advanced-node chips. Experience with Synopsys Fusion Compiler, Cadence and Siemens EDA tools and with TCL, Perl or Shell scripting is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

• 17d

  Sr. Staff Physical Design Engineer

  Vancouver, BC

  Full Time

  AI

  AMD, Inc.

  Candidates need strong experience in high-performance physical design, timing closure and physical signoff, plus proficiency in Python and TCL for flow automation. Experience leading engineers and an electronics or electrical engineering background are preferred.

  Synopsys ICC2, Fusion Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache RedHawk

  23d

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need deep place-and-route and physical design experience on complex, advanced-node chips, plus scripting skills in TCL, Perl or Shell. A bachelor's or master's degree in electrical, computer or a related engineering field is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

  23d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 27d

  Principal Physical Design Methodology Engineer

  Markham, ON

  S

  Synopsys

  10+ YOECandidates need a Bachelor's or Master's in Electrical or Computer Engineering and 10+ years of ASIC digital implementation experience. Deep expertise with Fusion Compiler or ICC2, high-speed IP experience, and Tcl and Python scripting are required.

  Fusion Compiler, ICC2, Innovus, PrimeTime, PrimePower, Tcl

3 companies