“LEC” jobs in Canada – Page 2

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• 29d

  Short Term 2027 Hardware Design Engineering Intern/Co-Op

  Markham, ON

  AM

  Advanced Micro Devices, Inc

  Candidates need to be enrolled in a Canadian university bachelor's program in electrical or computer engineering or a related field. Useful experience includes digital logic and VLSI, Verilog or VHDL, scripting in Perl, TCL or Python, C/C++, Linux/Unix, and physical design knowledge. A valid work authorization is required.

  Verilog, VHDL, Linux, UNIX

  29d

  Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op

  Markham, ON

  AM

  Advanced Micro Devices, Inc

  Advance Micro Devices, Inc needs candidates enrolled in a Canadian university bachelor's program in electrical or computer engineering or a related field. Useful skills include Verilog or VHDL, scripting in Perl or TCL, C or C++, Linux, ASIC design and physical design.

  Verilog, VHDL, Perl, TCL, Linux, UNIX

  29d

  Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op

  Vancouver, BC

  AM

  Advanced Micro Devices, Inc

  Candidates need to be enrolled in a Canadian university bachelor's program in electrical or computer engineering or a related field. Useful skills include Verilog or VHDL, digital and VLSI design, scripting in Perl, TCL or Shell, C/C++, and Linux/Unix.

  Verilog, VHDL, Perl, TCL, C/C++, Linux

  29d

  Short Term 2027 Data Analyst Intern/Co-Op

  Markham, ON

  AM

  Advanced Micro Devices, Inc

  Candidates need to be enrolled in a Canadian university undergraduate program in data analytics, data engineering, computer or electrical engineering, computer science or a related field. Skills in Python, SQL, R, Java, Tableau, Power BI and cloud data platforms are strongly encouraged.

  Python, SQL, R, Java, Power BI, Kubernetes

  29d

  Physical Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  AMD needs candidates with a bachelor's degree in electrical, electronics or computer engineering and expertise in ASIC physical design, place-and-route, timing closure and physical verification. They must be able to debug CAD flow issues with industry tools and optimize power, performance and area.

  Synopsys ICC2, Innovus, PrimeTime, Spyglass, RedHawk, VSI

• 1mo

  Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

  Markham, ON

  On-site

  

  Qualcomm Canada ULC

  2+ YOECandidates need a bachelor's, master's or PhD in engineering or science with 2 to 4+ years of ASIC design or verification experience, depending on degree. Strong SystemVerilog, synthesis and design tool skills and an understanding of high-performance processor design are needed.

  SystemVerilog, VCS, Synopsys Design Compiler, Cadence, Mentor, Linting tools

• 1mo

  Senior Physical Design Engineer - P&R

  Ottawa, ON

  RemoteFull Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  8+ YOECandidates need 8 or more years of ASIC digital place-and-route experience, recent hands-on work with Synopsys and Cadence tools, and knowledge of advanced FinFET nodes. Scripting skills and strong written communication for remote teamwork are also required.

  Synopsys, Cadence, PrimeTime, StarRC, RedHawk, Calibre

• 1mo

  Principal Engineer -Design

  Saskatoon, SK

  Full Time

  MS

  MCHP Semiconductor Canada ULC

  10+ YOECandidates need 10 years of experience in synthesis, static timing analysis and formal verification, plus tapeout experience on 16nm or smaller processes. Strong scripting skills and a degree in computer science or electrical/VLSI engineering are required.

  Cadence Genus, TCL, Perl, Python, UPF, CPF

• 1mo

  Physical Design Engineer, AI Accelerator IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ YOECandidates need a BS, MS or PhD in electrical, computer or computer science engineering, plus 5+ years of block-level or IP physical design through tapeout. Strong knowledge of advanced-node low-power design and signoff, and proficiency with Innovus, ICC2 or FusionCompiler, PrimeTime and scripting, are required.

  Innovus, ICC2, FusionCompiler, PrimeTime

• 1mo

  Senior ASIC (Front End) Design Engineer

  Toronto, ON

  Hybrid

  

  Ethernovia, Inc.

  10+ YOECandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.

  Verilog, Perl, TCL, C/C++, Make

6 companies