AI Performance Engineer (Cloud AI Engineering), Sr | Staff | Sr. Staff
Markham, ONQualcomm Technologies, Inc.
5+ YOECandidates need hands-on experience building and optimizing language models in PyTorch and ONNX, a deep understanding of transformer architectures, and strong Python skills. A Master's degree in a related field and 5+ years of hardware, software or systems experience are required.
PyTorch, ONNX, Triton, Python, torch.compile, TorchDynamo
LLM Serving Engineer (Cloud AI Engineering), Senior / Staff Engineer
Markham, ONQualcomm Technologies, Inc.
4+ YOECandidates need hands-on experience with LLM serving packages, strong PyTorch and Python skills, and solid computer science fundamentals. A bachelor's degree with 4+ years of experience, a master's with 3+ years, or a PhD with 2+ years is required.
PyTorch, Python, CUDA, Triton, vLLM, SGLang
PST Validation Engineer
Markham, ONQualcomm Technologies, Inc.
2+ YOECandidates need a bachelor's degree in science or engineering and 2+ years of ASIC design, verification or validation work, or a master's with 1+ year. They need knowledge of mobile chip architecture, regression and PVT testing, and C and Python programming.
Lauterbach Trace32, JTAG, Python, C
Emulation Performance/Debug Engineer
Markham, ONQualcomm Technologies, Inc.
2+ YOECandidates need a bachelor's degree in science or engineering with 2+ years of ASIC work, or a master's with 1+ year. Experience with emulation platforms, Verilog/SystemVerilog, C, Python, TCL and FPGA timing closure is preferred.
Veloce, Palladium, Xilinx FPGA, Intel FPGA, JTAG, Python
SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
7+ YOEQualcomm needs a candidate with 7+ years of silicon validation or platform bring-up experience and deep knowledge of NoCs, AXI, memory hierarchy, power modes and debug. A degree in engineering or computer science is required, with embedded C/C++, Python and assembly skills.
JTAG debugger, Perfmon, kernel debugger, emulation platform
SoC Debug Engineer, Senior Staff
Markham, ONQualcomm Technologies, Inc.
9+ YOECandidates need 9+ years of pre-silicon and post-silicon bring-up and debug experience, RTL understanding, and hands-on use of JTAG and lab equipment such as logic analyzers and oscilloscopes. A Master's in Computer or Electrical Engineering is required, along with the stated years of ASIC design or validation experience.
JTAG, Logic analyzer, Signal generator