Senior ASIC RTL Design Engineer, AI Networking IP
Ottawa, ONFull Time
AM
Advanced Micro Devices, Inc
Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.
Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python
Design Verification Engineer
Markham, ONFull Time
AM
Advanced Micro Devices, Inc
Candidates need hands-on hardware verification experience across multiple projects or tapeouts, with SystemVerilog, UVM, Verilog and scripting skills. A Bachelor's or Master's in Computer or Electrical Engineering is expected.
UVM, Verilog, Makefiles, Perl, Python, Ruby