“LEC tools” jobs in Canada

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• 11d

  Sessional Lecturer - THRA11H3S Introduction to Performance

  Toronto, ON

  

  University of Toronto

  1+ YOECandidates need a PhD in theatre or a related discipline, strong knowledge of theatre practice, and professional theatre experience. They must also have at least one year of prior experience teaching a university or studio theatre class.

  Teaching

• 16d

  ASIC Design Engineer, PCIe IP Enablement

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need hands-on ASIC hardware design experience with end-to-end ownership of complex digital IP through tape-out. Strong RTL and Verilog skills, low-power design knowledge and a Bachelor's or Master's in electrical or computer engineering are preferred.

  Verilog HDL, UPF, CPF, Lint tools, CDC tools, Synthesis tools

  28d

  Senior ASIC RTL Design Engineer, AI Networking IP

  Ottawa, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.

  Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python

  28d

  Short Term 2027 Data Analyst Intern/Co-Op

  Markham, ON

  AM

  Advanced Micro Devices, Inc

  Candidates need to be enrolled in a Canadian university undergraduate program in data analytics, data engineering, computer or electrical engineering, computer science or a related field. Skills in Python, SQL, R, Java, Tableau, Power BI and cloud data platforms are strongly encouraged.

  Python, SQL, R, Java, Power BI, Kubernetes

  28d

  Physical Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  AMD needs candidates with a bachelor's degree in electrical, electronics or computer engineering and expertise in ASIC physical design, place-and-route, timing closure and physical verification. They must be able to debug CAD flow issues with industry tools and optimize power, performance and area.

  Synopsys ICC2, Innovus, PrimeTime, Spyglass, RedHawk, VSI

  28d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 16d

  ASIC Design Engineer, PCIe IP Enablement

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need hands-on ASIC hardware design experience with end-to-end ownership of complex digital IP through tape-out. Strong RTL and Verilog skills, synthesis and CDC tool experience, and knowledge of low-power design are expected.

  Verilog, UPF, CPF

  22d

  Short Term 2027 Data Analyst Intern/Co-Op

  Markham, ON

  AI

  AMD, Inc.

  Candidates need to be enrolled in a Canadian university undergraduate program in a data or engineering field. Experience with Python, SQL, R, Java, data processing, cloud services and visualization tools is strongly encouraged.

  Power BI, Snowflake, Oracle, SQL Server, Microsoft Azure, Kubernetes

  23d

  Physical Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a bachelor's degree in an electrical, electronics or computer engineering discipline and deep experience in ASIC physical design implementation and signoff. They also need hands-on skill with industry EDA tools and power, performance and area optimization.

  Synopsys ICC2, Cadence Innovus, PrimeTime, Spyglass, RedHawk, Calibre

  23d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  23d

  Senior ASIC RTL Design Engineer, AI Networking IP

  Ottawa, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven RTL design experience in Verilog or SystemVerilog, ASIC or FPGA delivery experience, and a bachelor's or master's degree in computer or electrical engineering. Networking or high-speed interface knowledge, such as Ethernet or PCIe, is preferred.

  Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python

• 29d

  Senior Physical Design Engineer - P&R

  Ottawa, ON

  RemoteFull Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  8+ YOECandidates need 8 or more years of ASIC digital place-and-route experience, recent hands-on work with Synopsys and Cadence tools, and knowledge of advanced FinFET nodes. Scripting skills and strong written communication for remote teamwork are also required.

  Synopsys, Cadence, PrimeTime, StarRC, RedHawk, Calibre

• 29d

  Principal Engineer -Design

  Saskatoon, SK

  Full Time

  MS

  MCHP Semiconductor Canada ULC

  10+ YOECandidates need 10 years of experience in synthesis, static timing analysis and formal verification, plus tapeout experience on 16nm or smaller processes. Strong scripting skills and a degree in computer science or electrical/VLSI engineering are required.

  Cadence Genus, TCL, Perl, Python, UPF, CPF

• 29d

  Physical Design Engineer, AI Accelerator IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ YOECandidates need a BS, MS or PhD in electrical, computer or computer science engineering, plus 5+ years of block-level or IP physical design through tapeout. Strong knowledge of advanced-node low-power design and signoff, and proficiency with Innovus, ICC2 or FusionCompiler, PrimeTime and scripting, are required.

  Innovus, ICC2, FusionCompiler, PrimeTime

• 29d

  Senior ASIC (Front End) Design Engineer

  Toronto, ON

  Hybrid

  

  Ethernovia, Inc.

  10+ YOECandidates need a BS or MS in electrical engineering, computer science or a related field and 10+ years of ASIC RTL design or architecture experience. They must have built complex SoCs, know Verilog/SystemVerilog and simulation tools, and work well both independently and in teams.

  Verilog, Perl, TCL, C/C++, Make

7 companies