ASIC Engineer Intern
Ottawa, ON$25.50–$35/hrFull Time
CC
Ciena Canada ULC
Candidates need programming experience in Java, Python, TCL, Skill/Ocean or SystemVerilog, and familiarity with Linux. Experience with ASIC or FPGA work, debugging skills and Agile, JIRA, Confluence or Git are assets.
SystemVerilog, UVM, Python, TCL, Skill/Ocean, Java