Verification Engineer
Markham, ONFull Time
AI
AMD, Inc.
Candidates need strong SystemVerilog and UVM skills, experience with ASIC or SoC verification, and familiarity with constrained-random, coverage-driven and formal verification. A Bachelor's or Master's in computer or electrical engineering is required.
UVM, Synopsys VCS, Cadence IES, Cadence IEV, Jasper, Synopsys VC-Formal