Lead Physical Design Engineer, Place & Route
Markham, ONAdvanced Micro Devices, Inc
Candidates need deep experience with place-and-route and physical design on complex or advanced-node chips. Experience with Synopsys Fusion Compiler, Cadence and Siemens EDA tools and with TCL, Perl or Shell scripting is preferred.
Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell
STA/Constraints Engineer
Vancouver, BCAdvanced Micro Devices, Inc
Candidates need industry experience in static timing analysis, constraints and timing signoff, plus expert use of Synopsys PrimeTime and GCA. Scripting in Perl, TCL, Shell or Python, and a degree in microelectronics or a related field, are preferred.
GCA, ICC2, Verilog, Perl, TCL, Python
Principal ASIC Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a track record of leading ASIC or silicon designs through multiple tape-outs, plus deep RTL and microarchitecture skills. A bachelor's degree in an engineering or computer field is preferred, and a master's or PhD is desired.
Verilog, SystemVerilog, Python, Perl, Tcl