Pre-Silicon Validation Engineer
Markham, ONQualcomm Technologies, Inc.
Candidates need a Bachelor's or Master's degree in an engineering, computer science or related field, 0-2+ years in ASIC verification, FPGA prototyping or hardware emulation, and strong skills in SystemVerilog, C/C++, Linux, and Python. Experience with RTL debugging and SoC architectures is also required.
SystemVerilog, C/C++, Python, Linux, Cadence Palladium, Siemens Veloce
Senior Emulation Performance Methodology & Debug Engineer
Markham, ONQualcomm Technologies, Inc.
4+ YOECandidates need a bachelor's, master's or PhD in a science or engineering field with 4+, 3+ or 2+ years of ASIC design or verification experience respectively. Preferred: 5+ years in emulation and silicon environments, plus Verilog/SystemVerilog, C, Python, TCL and FPGA timing closure skills.
Veloce, Palladium, FPGA prototyping, JTAG debugger, Xilinx FPGA, Intel FPGA
SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
7+ YOEQualcomm needs a candidate with 7+ years of silicon validation or platform bring-up experience and deep knowledge of NoCs, AXI, memory hierarchy, power modes and debug. A degree in engineering or computer science is required, with embedded C/C++, Python and assembly skills.
JTAG debugger, Perfmon, kernel debugger, emulation platform
SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ YOEQualcomm Technologies needs candidates with a bachelor's degree in engineering and 5+ years in SoC validation or related areas. They must know clock or power validation, C and Python, lab instruments such as oscilloscopes, and JTAG debug on ARM-based SoCs.
Oscilloscope, Logic analyzer, Multimeter, Python, C, Perl
System Validation Lead (Premium Mobile Platforms)
Markham, ONQualcomm Technologies, Inc.
8+ YOECandidates need 8+ years of SoC validation, bring-up, or system software experience, deep knowledge of modern SoC architectures such as ARM CPUs, memory and interconnects, and proven pre- and post-silicon validation and debug skills. Leadership of geographically distributed teams is required.
Veloce, RUMI, FPGA
System Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
8+ YOECandidates need 8+ years of silicon validation or platform bring-up experience, strong C and Assembly skills, and bare-metal embedded knowledge. A BS, MS or PhD in an engineering or computer science field is required, plus the minimum years of ASIC work listed for each degree.
FPGA, Verilog, VHDL, Python, Linux shell, development boards