Staff Test Engineer (Hybrid Role)
Burlington, ONTalentlab
5+ YOECandidates need a Bachelor's degree or higher in electrical engineering, 5+ years of ATE semiconductor testing, and experience testing high-speed mixed-signal ICs. Advantest V93000 experience is preferred, along with PCB design and offshore test bring-up experience.
Advantest V93000, ATE
Staff Design Verification Engineer
Toronto, ONTalentlab
9+ YOECandidates need a Bachelor's or Master's in computer science, electrical engineering or a related field, plus at least 9 years of ASIC design verification experience. Strong SystemVerilog and UVM skills and advanced debugging are required.
SystemVerilog, UVM, EDA tools
Analog IC Design Engineer
Toronto, ONTalentlab
5+ YOECandidates need an MSc or PhD in electrical engineering or a related field and 5+ years of analog IC design experience, preferably silicon-proven. They need hands-on advanced CMOS experience, SPICE and Verilog-A simulation skills, and EDA tool proficiency.
SPICE, Verilog-A, EDA tools
Lead / Principal System Verification Engineer – Optical Networking
Ottawa, ONTalentlab
5+ YOECandidates need at least 5 years of system verification or validation experience in telecom or networking, hands-on DWDM or optical transport experience, and strong Python skills. A degree in electrical engineering, computer science or a related field is required.
Python, Jenkins, GitLab, CLI, gRPC, optical spectrum analyzer