Design Verification Engineer — Memory Subsystem (Vancouver)
Vancouver, BCQualcomm Canada ULC
3+ YOECandidates need a bachelor's or master's degree in an engineering or computer science field and 3 to 10 years of chip or subsystem verification experience. Hands-on skill with Verilog, SystemVerilog, UVM and assertions is required, and knowledge of memory standards such as DDR, LPDDR and HBM is preferred.
Verilog, SystemVerilog, UVM, SystemVerilog Assertions, waveform viewers
Clocking Systems Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ YOEQualcomm Canada ULC needs a bachelor's degree with 4+ years, a master's with 3+ years, or a PhD with 2+ years of systems engineering experience. Candidates need clocking, mixed-signal, SerDes or PLL/CDR experience, and skills in MATLAB, Python or SystemVerilog.
MATLAB, Python, SystemVerilog
Senior Embedded Software Engineer (C/C++), Machine Learning
Markham, ONQualcomm Canada ULC
2+ YOEQualcomm Canada ULC needs candidates with hands-on performance optimization experience and strong C/C++ programming skills. A bachelor's degree with 2+ years of related work, or a master's with 1+ year, is required; a PhD also qualifies.
C/C++, PyTorch, Caffe, Keras, Linux, Android
AI/Machine Learning Engineer (Embedded Systems, Inference Efficiency)
Markham, ONQualcomm Canada ULC
2+ YOECandidates need research-level expertise in inference efficiency, neural network architectures and model compression, plus a strong background in compilers and ML system optimization for AI accelerators. A bachelor's degree with 2+ years of related experience, a master's with 1+ year, or a PhD is required.
Machine learning, Embedded systems, Research, ML, Architectural design, Scheduling
FY27 Intern - MSIP Design Methodology Engineering Internship - Canada (16 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in an engineering or computer science degree program, available May/June 2027 to August/September 2028, and graduating November 2028 or later. Programming experience in C, C++ or Python, plus Linux/Unix scripting, is expected.
Verilog, TCL, Python, Perl, C++, Linux
FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled toward a bachelor's degree in engineering or computer science, available May or June 2027 to August or September 2028, and have digital design knowledge with Verilog or VHDL. Strong problem-solving, communication and teamwork skills are also required.
SystemVerilog, Verilog, VHDL, UVM, SystemC, Python