Senior ASIC RTL Design Engineer, AI Networking IP
Ottawa, ONFull Time
AI
AMD, Inc.
Candidates need proven RTL design experience in Verilog or SystemVerilog, ASIC or FPGA delivery experience, and a bachelor's or master's degree in computer or electrical engineering. Networking or high-speed interface knowledge, such as Ethernet or PCIe, is preferred.
Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python
Software Engineer, AI & Engineering Productivity Tools
Markham, ONFull Time
AI
AMD, Inc.
Candidates need production software experience, frontend skills in React, Angular or Vue, and database experience with PostgreSQL, MySQL or MongoDB. AMD also wants proficiency with AI-assisted development tools like Claude Code or Codex and familiarity with Linux environments.
Claude Code, OpenAI Codex, Git, Linux