FY27 Intern - Deep Learning Research Internship - Embodied AI - Canada (4 Months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need a strong foundation in deep learning, machine learning or robotics, plus proficiency in Python and PyTorch. Enrolment in a bachelor's, master's or PhD engineering or computer science program, with 1+ years of academic programming, is required.
Python, PyTorch, robotics simulators
Sr. Engineer, Machine Learning Software Verification
Markham, ONQualcomm Canada ULC
2+ YOEQualcomm Canada ULC asks for a bachelor's or master's degree in a related field with 2+ or 1+ years of software or hardware experience, plus Python, C++, Jenkins, Git, and Linux or Windows skills. Strong debugging and teamwork skills are needed, and ML frameworks such as TensorFlow or PyTorch are an asset.
Jenkins, Git, Python, C++, TensorFlow, PyTorch
Senior Director, Technology
Ottawa, ONQualcomm Canada ULC
10+ YOECandidates need a bachelor's in electrical engineering with 10 years of ASIC or IP development experience, or a master's with 8 years. They also need hands-on knowledge of Ethernet, UALink and OTN, HDL languages, SystemVerilog UVM and verification methods.
SystemVerilog, Verilog, VHDL, UVM, Unix/Linux, SVN
FY27 Intern - Softip Engineering Co-Op - Canada (4 months)
Ottawa, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.
Verilog, SystemVerilog, UVM, VHDL, SVN, CVS
Cross-Functional Engineer, Staff
Toronto, ON +1Qualcomm Canada ULC
4+ YOECandidates need a bachelor's, master's or PhD in Electrical Engineering with analog or mixed-signal chip design experience and several years of ASIC design or verification work. They also need strong high-speed SerDes knowledge, SystemVerilog and EDA tool skills.
Cadence, SPICE, MATLAB, Verilog, VHDL, SystemVerilog
Analog Engineer, Principal
Toronto, ONQualcomm Canada ULC
8+ YOECandidates need a Master's or PhD in electrical engineering (or a Bachelor's with 2+ years of analog or mixed-signal design), plus 8+ years of ASIC design or related work and silicon-proven analog circuit experience in advanced CMOS. Strong skills in Cadence, SPICE, MATLAB or Verilog-A are expected.
Cadence ADE, MATLAB, SPICE, Verilog-A
Program Manager
Toronto, ONQualcomm Canada ULC
2+ YOECandidates need a bachelor's degree in electrical engineering or a related field, plus experience in stage gate processes and high speed SerDes IP development. Scheduling skills in MS Project and familiarity with advanced process nodes at 5nm and below are also needed. A PMP certification is an asset.
MS Project
Firmware Engineer, Edge AI Silicon Validation (Embedded C)
Markham, ONQualcomm Canada ULC
2+ YOECandidates need at least 2 years of embedded firmware or silicon validation experience in C, plus a bachelor's degree and 4 or more years of ASIC validation work (or a master's with 3 years, or a PhD with 2 years). Strong debugging, lab equipment and communication skills are needed.
Oscilloscope, Protocol analyzer, JTAG debugger, FPGA prototyping system, Perforce, Git
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ YOECandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL
FY27 Intern - Camera Systems Internship - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled toward a bachelor's or master's in engineering, computer science or a related field, and be available for a 16-month internship. Experience with microcontrollers, RTOS or ARM architectures, plus Android debugging and version control, is preferred.
JTAG, ADB, Android development environments, Version-control systems