“SystemVerilog” jobs in Canada – Page 4

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• 29d

  Staff ASIC Verification Engineer, Low Power AI

  Markham, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOEQualcomm Canada ULC needs candidates with a relevant degree and 4+ years of ASIC work (3+ with a master's, 2+ with a PhD). Expert knowledge of Verilog, VHDL and SystemVerilog UVM is required, plus solid C skills.

  SystemVerilog, UVM, Verilog, VHDL, SystemC, Perl

  1mo

  DFT Engineer, Principal

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  8+ YOECandidates need 10+ years of SoC experience in RTL, DFT or front-end roles, and extensive use of Siemens, Synopsys and Cadence DFT tools. Strong Verilog, VHDL and SystemVerilog skills, knowledge of JTAG, iJTAG and BIST standards, and TCL or Python scripting are expected.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

  1mo

  DFT Engineer (Senior to Staff level)

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  10+ YOECandidates need a bachelor's degree in an engineering or computer science field and 10+ years of SoC design experience in RTL, DFT or front-end work. They need strong knowledge of DFT tools, Verilog, VHDL and SystemVerilog, and standards such as JTAG, iJTAG and BIST.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

  1mo

  Firmware Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  6+ YOECandidates need a bachelor's, master's or PhD in a related field plus 4, 3 or 2 years of software engineering experience respectively, and 6+ years with embedded systems and strong C/C++ and Python skills. Hands-on lab bring-up and debugging experience with high-speed signals and protocols such as PCIe and Ethernet is expected.

  oscilloscope, JTAG debugger, EDA tools, Jira, Confluence

  1mo

  Digital Design Verification Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOECandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.

  Verilog, SystemVerilog, UVM, Python, Perl, C/C++

  1mo

  Firmware Engineer – SerDes PHY (all levels)

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.

  JTAG debuggers, git, Verilog, SystemVerilog

  1mo

  Design Verification Engineer — Memory Subsystem (Vancouver)

  Vancouver, BC

  On-site

  

  Qualcomm Canada ULC

  3+ YOECandidates need a bachelor's or master's degree in an engineering or computer science field and 3 to 10 years of chip or subsystem verification experience. Hands-on skill with Verilog, SystemVerilog, UVM and assertions is required, and knowledge of memory standards such as DDR, LPDDR and HBM is preferred.

  Verilog, SystemVerilog, UVM, SystemVerilog Assertions, waveform viewers

  1mo

  Clocking Systems Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOEQualcomm Canada ULC needs a bachelor's degree with 4+ years, a master's with 3+ years, or a PhD with 2+ years of systems engineering experience. Candidates need clocking, mixed-signal, SerDes or PLL/CDR experience, and skills in MATLAB, Python or SystemVerilog.

  MATLAB, Python, SystemVerilog

  1mo

  Senior ASIC Design Engineer, Compute DSP/AI Processors (multiple levels)

  Markham, ON

  On-site

  

  Qualcomm Canada ULC

  2+ YOECandidates need a bachelor's, master's or PhD in engineering or science with 2 to 4+ years of ASIC design or verification experience, depending on degree. Strong SystemVerilog, synthesis and design tool skills and an understanding of high-performance processor design are needed.

  SystemVerilog, VCS, Synopsys Design Compiler, Cadence, Mentor, Linting tools

  1mo

  Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)

  Markham, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOECandidates need an engineering degree and, for senior roles, several years of ASIC design or verification experience. Strong skills in UVM, SystemVerilog, digital logic and scripting in Python or CShell are expected, along with good problem solving and communication.

  SystemVerilog, UVM, Python, CShell

  1mo

  FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)

  Markham, ON

  On-siteInternship

  

  Qualcomm Canada ULC

  1+ YOECandidates need to be enrolled toward a bachelor's degree in engineering or computer science, available May or June 2027 to August or September 2028, and have digital design knowledge with Verilog or VHDL. Strong problem-solving, communication and teamwork skills are also required.

  SystemVerilog, Verilog, VHDL, UVM, SystemC, Python

• 29d

  Principal Design Verification Engineer

  Toronto, ON

  

  indie

  7+ YOECandidates need a BSEE, BSCE or BSCS and 7+ years of design verification experience. Required skills include constrained random verification with SystemVerilog and UVM, coverage-driven verification, and strong programming in C/C++ with Python, Tcl or Perl scripting.

  SystemVerilog, UVM, C, C++, Python, Tcl

• 1mo

  FPGA Designer

  Ottawa, ON

  $125k–$160k/yrRemoteFull Time

  

  Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…

  5+ YOECandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.

  Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog

  1mo

  FPGA Designer

  Kitchener, ON

  $125k–$160k/yrRemoteFull Time

  

  Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…

  5+ YOECandidates need at least 5 years of FPGA design experience using RTL, Verilog or VHDL, with knowledge of video, communications and DSP systems. Fidus Systems also requires Xilinx or Altera tool experience, a degree in engineering, strong English communication skills, and the ability to pass Canadian controlled-goods security screening.

  Xilinx Vivado, Altera Quartus, ModelSim, Verilog, VHDL, SystemVerilog

• 1mo

  Summer 2027 Long Term ASIC Verification Engineering Intern/ Co-Op

  Ottawa, ON

  AM

  Advanced Micro Devices, Inc

  Candidates need to be 3rd or 4th year Computer Engineering or Computer Science students with digital design knowledge, object-oriented coding skills, and experience with SystemVerilog, C or C++. Experience with AI tools is required, and Python, Perl or other scripting languages are an asset.

  SystemVerilog, UVM, C++, Python, Perl

  1mo

  SoC Design Lead, Microarchitecture and Design Methodology

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a strong foundation in computer architecture and digital design, with knowledge of static timing analysis, clocks and power optimization. Verilog or SystemVerilog experience, with UVM preferred, and strong communication and teamwork skills are needed.

  Verilog, SystemVerilog, UVM

  1mo

  RTL/Firmware Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's degree in computer engineering, electrical engineering, computer science or a related field. Preferred skills include embedded C/C++, Verilog or SystemVerilog, Python scripting, computer architecture and hands-on use of AI coding tools.

  Verilog, SystemVerilog, Python, Perl, Git, Perforce

  1mo

  Principal ASIC Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a track record of leading ASIC or silicon designs through multiple tape-outs, plus deep RTL and microarchitecture skills. A bachelor's degree in an engineering or computer field is preferred, and a master's or PhD is desired.

  Verilog, SystemVerilog, Python, Perl, Tcl

• 1mo

  Senior I/O Chiplet Verification Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10 or more years of hands-on ASIC verification experience through tape-out sign-off, strong SystemVerilog and UVM skills, and experience with high-speed interfaces or die-to-die interconnect. Scripting, regression automation and clear written communication are essential.

  SystemVerilog, UVM, UPF

  1mo

  Senior I/O Chiplet RTL Design Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10+ years of hands-on ASIC RTL design with tape-out ownership, strong SystemVerilog and Verilog skills, and experience with high-speed interfaces such as PCIe, Ethernet or die-to-die links. They also need synthesis, timing constraint and CDC/RDC expertise, plus scripting in Python or Tcl.

  SystemVerilog, Verilog, Python, Tcl

  1mo

  Senior FPGA Design Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need about 10 to 15 years of hands-on FPGA design experience and strong current SystemVerilog skills. They must handle clock domain crossings, configure synthesis tools, write SDC constraints, and analyze synthesis reports, and be available to work on-site in Ottawa.

  SystemVerilog, SDC

• 1mo

  Senior Hardware Engineer

  Burnaby, BC

  $108k–$153k/yrFull Time

  

  LMI Technologies

  5+ YOECandidates need a bachelor's degree in electrical engineering and at least five years designing and testing digital logic such as FPGAs or ASICs. Hands-on experience with VHDL or Verilog, high-speed interfaces and self-verifying simulation environments is required.

  Vivado, Chipscope, Logic analyzers, Oscilloscopes, Xilinx IP, Intel FPGA

• 1mo

  FPGA Design Engineer

  Burlington, ON

  $70k–$100k/yrFull Time

  EM

  Evertz Microsystems Limited: Evertz Microsystems (TSX:ET) is a leading global manufacturer of broadcast equipment and solutions that deliver content to television sets,…

  1+ YOECandidates need a bachelor's degree in electrical or computer engineering, 1 to 5 years of FPGA design experience, and HDL skills in VHDL, Verilog, or SystemVerilog. Hands-on lab debugging, simulation, and familiarity with Vivado or Quartus are also required.

  Xilinx Vivado, Intel Quartus, Oscilloscopes, Waveform monitors, Git

• 1mo

  FPGA Engineer

  Ottawa, ON

  $105k–$145k/yrFull Time

  

  Q-Block Computing: Imagine instruments precise enough to probe this reality—to ask whether the cosmos operates according to Nature’s own algorithms.

  4+ YOECandidates need a related engineering degree, 4+ years of professional FPGA design and verification experience, and hands-on work with Vivado, Quartus or Lattice toolchains. They also need strong high-speed digital design skills and proficiency with oscilloscopes, logic analyzers and signal generators.

  Xilinx Vivado, Intel Quartus, Lattice toolchain, oscilloscope, logic analyzer, signal generator

8 companies