PST Validation Engineer
Markham, ONQualcomm Technologies, Inc.
2+ YOECandidates need a bachelor's degree in science or engineering and 2+ years of ASIC design, verification or validation work, or a master's with 1+ year. They need knowledge of mobile chip architecture, regression and PVT testing, and C and Python programming.
Lauterbach Trace32, JTAG, Python, C
DDR Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ YOECandidates need at least 5 years in DDR or memory subsystem validation or silicon bring-up, plus knowledge of LPDDR architectures, memory controllers and PHYs, and strong post-silicon debug skills. Qualcomm also requires a bachelor's, master's or PhD and C/C++ proficiency.
emulation platforms, FPGA, C, C++
Pre-Silicon Validation Engineer
Markham, ONQualcomm Technologies, Inc.
Candidates need a Bachelor's or Master's degree in an engineering, computer science or related field, 0-2+ years in ASIC verification, FPGA prototyping or hardware emulation, and strong skills in SystemVerilog, C/C++, Linux, and Python. Experience with RTL debugging and SoC architectures is also required.
SystemVerilog, C/C++, Python, Linux, Cadence Palladium, Siemens Veloce
SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ YOEQualcomm Technologies needs candidates with a bachelor's degree in engineering and 5+ years in SoC validation or related areas. They must know clock or power validation, C and Python, lab instruments such as oscilloscopes, and JTAG debug on ARM-based SoCs.
Oscilloscope, Logic analyzer, Multimeter, Python, C, Perl
EDA/CAD Software Engineer, Staff
Markham, ONQualcomm Technologies, Inc.
7+ YOECandidates need a bachelor's degree in science or engineering with 7+ years of related experience, or the equivalent advanced degree with fewer years. Strong C++, Linux, CAD software development and VLSI or ASIC design skills are preferred.
Git, LSF, JIRA, GCC
System Validation Lead (Premium Mobile Platforms)
Markham, ONQualcomm Technologies, Inc.
8+ YOECandidates need 8+ years of SoC validation, bring-up, or system software experience, deep knowledge of modern SoC architectures such as ARM CPUs, memory and interconnects, and proven pre- and post-silicon validation and debug skills. Leadership of geographically distributed teams is required.
Veloce, RUMI, FPGA
System Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
8+ YOECandidates need 8+ years of silicon validation or platform bring-up experience, strong C and Assembly skills, and bare-metal embedded knowledge. A BS, MS or PhD in an engineering or computer science field is required, plus the minimum years of ASIC work listed for each degree.
FPGA, Verilog, VHDL, Python, Linux shell, development boards
SoC Debug Engineer, Senior Staff
Markham, ONQualcomm Technologies, Inc.
9+ YOECandidates need 9+ years of pre-silicon and post-silicon bring-up and debug experience, RTL understanding, and hands-on use of JTAG and lab equipment such as logic analyzers and oscilloscopes. A Master's in Computer or Electrical Engineering is required, along with the stated years of ASIC design or validation experience.
JTAG, Logic analyzer, Signal generator
SoC Debug Engineer, Staff
Markham, ONQualcomm Technologies, Inc.
6+ YOECandidates need 6+ years of pre-silicon and post-silicon bring-up and failure analysis experience, plus RTL understanding and JTAG and lab equipment skills. A Master's in Computer or Electrical Engineering is required, along with ASIC experience.
JTAG, Logic analyzer, Signal generator