Senior Design Verification Engineer
Toronto, ONAstera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.
2+ YOECandidates need a bachelor's degree in electrical engineering or a related field and 2 to 5 years of verifying complex chips. Hands-on SystemVerilog, UVM and C/C++ experience, including C/C++ integration with SystemVerilog, is required, as is authorization to work in Canada.
SystemVerilog, UVM, C/C++, Python, Perl, FPGA emulation platform