Senior ASIC Design Verification Engineer, Compute DSP/AI Processors (multiple levels)
Markham, ONOn-site
QC
Qualcomm Canada ULC
4+ YOECandidates need an engineering degree and, for senior roles, several years of ASIC design or verification experience. Strong skills in UVM, SystemVerilog, digital logic and scripting in Python or CShell are expected, along with good problem solving and communication.
SystemVerilog, UVM, Python, CShell
FY27 Intern - Compute DSP/AI Processor Engineering Internship - Canada (16 months)
Markham, ONOn-siteInternship
QC
Qualcomm Canada ULC
1+ YOECandidates need to be enrolled toward a bachelor's degree in engineering or computer science, available May or June 2027 to August or September 2028, and have digital design knowledge with Verilog or VHDL. Strong problem-solving, communication and teamwork skills are also required.
SystemVerilog, Verilog, VHDL, UVM, SystemC, Python