GPU Design Verification Engineer
Markham, ONOn-site
Qualcomm Canada ULC
2+ YOECandidates need a relevant engineering or computer science degree plus years of hardware or software experience, depending on degree level. They need SystemVerilog, UVM, C/C++ and verification skills such as test planning, simulation and debug.
UVM, Veloce, Palladium, Zebu, FPGA, Python
Digital Design Verification Engineer, Staff
Toronto, ONOn-site
Qualcomm Canada ULC
4+ YOECandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.
Verilog, SystemVerilog, UVM, Python, Perl, C/C++