STA/Constraints Engineer
Vancouver, BCFull Time
AM
Advanced Micro Devices, Inc
Candidates need industry experience in static timing analysis, constraints and timing signoff, plus expert use of Synopsys PrimeTime and GCA. Scripting in Perl, TCL, Shell or Python, and a degree in microelectronics or a related field, are preferred.
GCA, ICC2, Verilog, Perl, TCL, Python
Principal ASIC Design Engineer
Markham, ONFull Time
AM
Advanced Micro Devices, Inc
Candidates need a track record of leading ASIC or silicon designs through multiple tape-outs, plus deep RTL and microarchitecture skills. A bachelor's degree in an engineering or computer field is preferred, and a master's or PhD is desired.
Verilog, SystemVerilog, Python, Perl, Tcl