Lead Software Test Framework Engineer
Markham, ONQualcomm Canada ULC
4+ YOECandidates need 4+ years of C/C++ and scripting experience in Python or Perl, plus a bachelor's, master's or PhD in a related field with 4+, 3+ or 2+ years of relevant work experience. Strong written and verbal communication and teamwork in a fast-paced environment are also required.
Jenkins, Docker, Kubernetes, Snapdragon platform
FY27 Intern - Display IP FPGA Emulation Intern - Canada (4 months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need to be in study toward a bachelor's degree in computer engineering, engineering science, computer science or a related field, with at least one year of academic programming experience. Knowledge of RTL, Verilog or SystemVerilog, digital design and Linux is required, plus teamwork and communication skills.
FPGA, Verilog, Linux, Perl, Python, TCL
GPU Design Verification Engineer
Markham, ONQualcomm Canada ULC
2+ YOECandidates need a relevant engineering or computer science degree plus years of hardware or software experience, depending on degree level. They need SystemVerilog, UVM, C/C++ and verification skills such as test planning, simulation and debug.
UVM, Veloce, Palladium, Zebu, FPGA, Python
FY27 Intern - Machine Learning Engineering Internship - Canada (4 months)
Markham, ONQualcomm Canada ULC
1+ YOEQualcomm Canada ULC needs candidates studying toward a bachelor's degree in computer engineering, engineering science, computer science, or a related field, available May or June 2027 through August or September 2027, with graduation in November 2027 or later and 1+ years of academic programming experience in languages such as C, C++, or Python.
Snapdragon platform, HackerRank
Engineer
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need a bachelor's degree in engineering, information systems, computer science or a related field. Preferred experience includes programming in C, C++, Java or Python, database management, APIs, and source code management with Git or Perforce.
Git, Perforce
FY27 Intern - Qualcomm SoC Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ YOEQualcomm Canada ULC needs students pursuing a Bachelor's or Master's in electrical or computer engineering, computer science or AI/ML, available May or June 2027 to August or September 2028. Candidates need strong programming skills in C, C++ or Python and digital logic fundamentals.
Verilog, SystemVerilog, EDA tools
FY27 Intern - Deep Learning Research Internship - Canada (4 Months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need experience building deep learning models for text, image or video, and a strong foundation in deep learning with Python and PyTorch. They must be enrolled toward a bachelor's, master's or PhD in an engineering or computer science field, available May or June 2027, and graduating November 2027 or later.
PyTorch, Python
FY27 Intern - Digital Design Engineering Internship - Canada (16 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's program in electrical or computer engineering, computer science or a related field, with graduation in November 2028 or later. Experience with Verilog or SystemVerilog, RTL design and at least one year of programming in C, C++ or Python is required, with FPGA or tapeout experience as a plus.
Verilog, SystemVerilog, FPGA, EDA tools
FY27 Intern - Design Verification Engineering Internship - Canada (16 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's program in electrical, computer or engineering science, or a related field, with an expected graduation of November 2028 or later. They need at least one year of academic programming experience in C, C++ or Python, and are preferred with Verilog/SystemVerilog and verification methodology knowledge.
Synopsys VCS, Verdi, SystemVerilog, Verilog, UVM
Analog Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ YOECandidates need a bachelor's, master's or PhD in electrical engineering with analog or mixed-signal CMOS design experience and several years of ASIC design or verification work. Experience with circuit design tools, transistor-level design, layout optimization and silicon-proven analog blocks is required.
Cadence ADE, MATLAB, SPICE, Verilog-A, Verilog, VHDL