Analog Design, Staff Engineer
Ottawa, ONS
Synopsys
3+ YOECandidates need a degree in electrical or computer engineering plus relevant experience, strong transistor-level CMOS design skills and SerDes circuit experience. Familiarity with SPICE, Verilog-A and scripting languages is also needed.
SPICE, Verilog-A, MATLAB, Python, TCL, Perl
AMS Design Verification Engineer
Mississauga, ONS
Synopsys
5+ YOESynopsys needs candidates with a degree in electrical or computer engineering and strong knowledge of analog and mixed-signal circuits. Candidates should know SystemVerilog and UVM, have used AMS simulation tools, and be comfortable scripting in Python, Perl or shell.
HSPICE, XA, CustomSim, VCS, SystemVerilog, UVM