Program Manager
Toronto, ONQualcomm Canada ULC
2+ YOECandidates need a bachelor's degree in electrical engineering or a related field, plus experience in stage gate processes and high speed SerDes IP development. Scheduling skills in MS Project and familiarity with advanced process nodes at 5nm and below are also needed. A PMP certification is an asset.
MS Project
Staff Engineer, Physical Design/Implementation
Toronto, ONQualcomm Canada ULC
3+ YOECandidates need a Master's degree with 3+ years or a Bachelor's with 4+ years of ASIC physical design experience. They need hands-on skill with industry chip design tools and strong knowledge of timing, power and clocking.
Cadence Innovus, Synopsys ICC2
Physical Design Engineer, Staff
Toronto, ONQualcomm Canada ULC
7+ YOECandidates need 7+ years of physical design experience and a Bachelor's in Electrical or Computer Engineering or equivalent. Low-power, SoC and advanced technology node experience are desired, along with strong analytical, scripting and collaboration skills.
EDA tools
FY27 Intern - AI Software Systems Co-op - Canada (4 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be in study toward a bachelor's degree in engineering or computer science, with experience building full-stack applications using React, Node.js and PostgreSQL. They also need strong JavaScript, TypeScript, SQL, REST API, Git and Linux skills, plus an understanding of LLMs and AI agents.
React, Node.js, PostgreSQL, Git, Linux, Docker
FY27 Intern - AI Software Engineering Co-op - Canada (4 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be pursuing a bachelor's degree in engineering or computer science and show full-stack experience with React, Node.js, and PostgreSQL. They also need JavaScript/TypeScript, SQL, REST API, Git, and Linux skills, plus an understanding of LLMs and AI agents.
React, Node.js, PostgreSQL, Git, Linux, Docker
Engineer
Markham, ONQualcomm Canada ULC
1+ YOECandidates need a bachelor's degree in engineering or a related field, plus 6 months to 2 years of experience in chip design, VLSI or digital design, including internships. They should understand digital logic and timing, know basic physical design steps, and have scripting skills in Python, Tcl, Perl or Shell.
Verilog, SystemVerilog, EDA tools
Sr ASIC Design Verification Engineer, Low Power AI
Markham, ONQualcomm Canada ULC
2+ YOEQualcomm Canada ULC needs candidates with a bachelor's, master's or PhD and 2 to 4+ years of ASIC work, depending on degree. Expert skill in Verilog, SystemVerilog, UVM and C, plus a deep understanding of ASIC/VLSI concepts, is required.
SystemVerilog, UVM, Verilog, VHDL, SystemC, Perl
Staff Verification Engineer, Compute Subsystems
Markham, ONQualcomm Canada ULC
4+ YOECandidates need a relevant engineering degree and several years of ASIC design or verification experience, with hands-on work in SystemVerilog assertions, formal verification tools, and UVM. Scripting skills in Python, Perl, Tcl, or shell and strong problem-solving and communication abilities are also required.
SystemVerilog, UVM, VC Formal, JasperGold, Questa Formal, Python
FY27 Intern - Camera HW ASIC Verification Intern - Canada (12 or 16 months)
Vancouver, BCQualcomm Canada ULC
1+ YOECandidates need Verilog or SystemVerilog skills, ASIC design verification experience and scripting ability. Study toward a bachelor's degree in electrical, computer or a related engineering field is required.
Verilog, UVM, Python, Perl
FY27 Intern - Applied AI Engineering Intern (Hardware Systems) - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be pursuing a BS or MS in electrical, computer engineering, computer science or a related field, with strong Python and/or C/C++ skills. Digital design knowledge, Linux familiarity and a passion for AI and LLMs are required, and Verilog, SystemVerilog and FPGA experience is preferred.
Python, C/C++, SystemC, SystemVerilog, Linux, Git
FY27 Intern - Camera Design Implementation Intern - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled in a bachelor's degree in engineering, computer science or a related field, with an expected graduation of November 2028 or later. Strong scripting skills and knowledge of ASIC design flow are needed.
synthesis tools, static timing analysis tools, formal verification tools
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ YOECandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL
FY27 Intern - Camera Systems Internship - Canada (16 months)
Vancouver, BCQualcomm Canada ULC
Candidates need to be enrolled toward a bachelor's or master's in engineering, computer science or a related field, and be available for a 16-month internship. Experience with microcontrollers, RTOS or ARM architectures, plus Android debugging and version control, is preferred.
JTAG, ADB, Android development environments, Version-control systems
Camera Frontend Implementation Engineer
Vancouver, BCQualcomm Canada ULC
Candidates need a Bachelor's degree in science, engineering, or a related field, plus hands-on experience with large-block chip synthesis and timing closure. Strong scripting skills and the ability to lead design reviews and collaborate across teams are required.
RTL, DFT, Leadership, Recruitment