Hardware Validation Engineer, Sr Staff
Nepean, ONS
Synopsys
6+ YOECandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer