Firmware Engineer Intern Spring Co-Op
Vancouver, BCAstera Labs Early Career - North America 2027
Candidates need a computer science or electrical or software engineering background, at least one co-op term of firmware or embedded development, and coursework or experience with an RTOS. They also need C or C++ firmware skills, Python scripting, and experience with git, code reviews and CI.
JTAG, git, gcc, make, PyTest, GoogleTest
Firmware Engineer Intern (Ottawa)
Ottawa, ONAstera Labs Early Career - North America 2027
2+ YOEAstera Labs needs a bachelor's degree in computer science or electrical or computer engineering, 2-5 years of embedded C/C++ on real hardware, and Linux and git skills. Python scripting and strong debugging and communication skills are also required.
oscilloscope, BERT, logic analyzer, Jenkins, gdb, git
Firmware Engineer Intern Fall Co-op
Vancouver, BCAstera Labs Early Career - North America 2027
Astera Labs needs candidates in computer science or electrical or software engineering who have completed a co-op term in firmware or embedded software and have used a real-time operating system. They must know C or C++, Python, git, and code reviews, and be able to debug with JTAG or trace logs.
JTAG, git, PyTest, GoogleTest, gcc, make
Digital Design Engineer Intern (Toronto)
Toronto, ONAstera Labs Early Career - North America 2027
Candidates need to be pursuing a bachelor's or master's degree in electrical, computer engineering, computer science or a related field. They need digital logic or RTL coursework or project experience, programming skills in Verilog, SystemVerilog, C/C++ or Python, and familiarity with Linux and Git.
Verilog, SystemVerilog, Linux, Git, Python, Tcl
DFT Engineering Intern
Toronto, ONAstera Labs Early Career - North America 2027
Candidates need coursework or hands-on experience in electrical or computer engineering or a related field, and an understanding of digital logic and RTL. Programming in Verilog, SystemVerilog, Python, Tcl, Perl, C or C++ is needed, plus comfort in a Linux environment.
Verilog, SystemVerilog, Python, Tcl, Perl, Linux
Design Verification Engineer Intern (Toronto)
Toronto, ONAstera Labs Early Career - North America 2027
Candidates need to be pursuing a bachelor's or master's degree in electrical, computer engineering or computer science. They need coding skills in SystemVerilog, C/C++ or Python, Linux and Git familiarity, and strong debugging ability.
VCS, Verdi, DVE
Analog Mixed Signal Engineer Intern (Toronto)
Toronto, ONAstera Labs Early Career - North America 2027
Astera Labs needs candidates pursuing an M.S. or Ph.D. in Electrical Engineering, ideally with prior analog, mixed-signal, RF or custom IC design internship experience. Strong circuit fundamentals, device physics and simulation skills are expected.
Industry-standard circuit design and simulation tools, Verilog-A, Verilog, Python, MATLAB