GPU Design Verification Engineer
Markham, ONFull Time
AI
AMD, Inc.
Candidates need IP-level ASIC verification experience, UVM testbench skills, and knowledge of SystemVerilog, Verilog, C/C++ and scripting in Python, Perl or shell. A Bachelor's or Master's in computer or electrical engineering is preferred.
UVM, Verilog, C++, Python, Perl, Makefile
Silicon Design Verification Engineer
Markham, ONFull Time
AI
AMD, Inc.
Candidates need a Bachelor's or Master's in Computer or Electrical Engineering, knowledge of digital design and computer architecture, and hands-on SystemVerilog, UVM and C++ or Python experience. Prior verification work and PCIe or AXI protocol knowledge are assets.
UVM, C++, Python, Formal verification tools