“Cadence DFT tools” jobs in Canada

No matching filters. Try another name.

Results

• 10h

  Sr/Staff Digital Design Engineer

  Toronto, ON

  

  Lightmatter

  5+ YOELightmatter needs candidates with a bachelor's degree in electrical or computer engineering and at least 5 years of ASIC or high-speed chip design experience, including multiple successful tape-outs. Candidates must know SystemVerilog or Verilog and have proven experience debugging logic and mixed-signal simulations.

  SystemVerilog, Verilog, Synopsys VCS, Cadence Xcelium, Questa

  29d

  Sr. Staff Physical Design Timing Engineer (STA)

  Toronto, ON

  

  Lightmatter

  12+ YOELightmatter needs candidates with a bachelor's degree in electrical or computer engineering and 12 years of physical design experience, including 5 years of hands-on ASIC timing work. They must be skilled in Cadence or Synopsys timing tools and scripting in TCL and Python, Perl, or Shell.

  Synopsys PrimeTime, Cadence Tempus

• 6d

  Staff Engineer, Physical Design/Implementation

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  3+ YOECandidates need a Master's degree with 3+ years or a Bachelor's with 4+ years of ASIC physical design experience. They need hands-on skill with industry chip design tools and strong knowledge of timing, power and clocking.

  Cadence Innovus, Synopsys ICC2

  7d

  SOC Design Engineer

  Markham, ON +2

  On-site

  QC

  Qualcomm Canada ULC

  4+ YOECandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.

  Spyglass, Design Compiler, Cadence LEC, Perl, TCL

  28d

  DFT Engineer, Principal

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  8+ YOECandidates need 10+ years of SoC experience in RTL, DFT or front-end roles, and extensive use of Siemens, Synopsys and Cadence DFT tools. Strong Verilog, VHDL and SystemVerilog skills, knowledge of JTAG, iJTAG and BIST standards, and TCL or Python scripting are expected.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

  28d

  DFT Engineer (Senior to Staff level)

  Toronto, ON

  On-site

  QC

  Qualcomm Canada ULC

  10+ YOECandidates need a bachelor's degree in an engineering or computer science field and 10+ years of SoC design experience in RTL, DFT or front-end work. They need strong knowledge of DFT tools, Verilog, VHDL and SystemVerilog, and standards such as JTAG, iJTAG and BIST.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

• 23d

  Staff Physical Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ YOECandidates need 5+ years of physical design experience on digital ASICs, including advanced nodes like TSMC N5, N4P or N3. They must know industry EDA tools, PnR, timing analysis and physical verification, and be strong in TCL, Python or Perl.

  Synopsys ICC2, Cadence Innovus, Calibre, PrimeTime, RedHawk, TCL

• 23d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 25d

  Physical Design Engineer - Synth, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOECandidates need 8+ years of ASIC implementation experience, including at least two tapeouts, and strong synthesis and timing-closure experience on large designs. Expertise with Genus or Design Compiler, SDC constraints, Tcl and Python scripting, and advanced process nodes (7nm and below preferred) is required.

  Cadence Genus, Synopsys Design Compiler, Tcl, Python

• 27d

  Sr. Manager, Physical Design Engineering, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  10+ YOE5+ MgmtAmazon Development Centre Canada needs 5+ years leading physical design teams of 8+ engineers and 10+ years of hands-on ASIC/SoC physical design across advanced nodes. Candidates must master both Synopsys and Cadence EDA tools, advanced STA and power integrity, and hierarchical flows for very large SoCs.

  Synopsys Fusion Compiler, ICC2, PrimeTime, StarRC, RedHawk-SC, Cadence Innovus

• 28d

  Senior Electronics Designer – High-Speed PCB and Embedded Systems

  Waterloo, ON

  $100k–$135k/yrFull Time

  

  Randstad Canada

  8+ YOECandidates need a bachelor's degree in electrical or computer engineering (master's or PhD preferred), typically 8+ years of hardware design experience, and expert skills in PCB layout tools, high-speed and mixed-signal design, signal and power integrity, and lab test equipment. Strong technical leadership and communication skills are required.

  Siemens PADS, Altium Designer, Cadence Allegro, high-bandwidth oscilloscope, logic analyzer, spectrum analyzer

• 29d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 29d

  Senior Physical Design Engineer - P&R

  Ottawa, ON

  RemoteFull Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  8+ YOECandidates need 8 or more years of ASIC digital place-and-route experience, recent hands-on work with Synopsys and Cadence tools, and knowledge of advanced FinFET nodes. Scripting skills and strong written communication for remote teamwork are also required.

  Synopsys, Cadence, PrimeTime, StarRC, RedHawk, Calibre

• 29d

  Principal NPI Test Engineer

  Burlington, ON

  Full Time

  S

  Semtech_Canada_Corporation

  12+ YOECandidates need a bachelor's degree in an engineering field, 12+ years in semiconductor test including 8+ years in mixed-signal or RF test, and a proven record leading NPI programs for high-speed communication ICs.

  Advantest V93000, SmarTest 7/8, Cadence, Altium

• 29d

  Principal Engineer -Design

  Saskatoon, SK

  Full Time

  MS

  MCHP Semiconductor Canada ULC

  10+ YOECandidates need 10 years of experience in synthesis, static timing analysis and formal verification, plus tapeout experience on 16nm or smaller processes. Strong scripting skills and a degree in computer science or electrical/VLSI engineering are required.

  Cadence Genus, TCL, Perl, Python, UPF, CPF

• 29d

  Lead DFT Engineer

  Remote in Canada

  Remote

  

  EnCharge AI

  12+ YOE2+ MgmtCandidates need 12+ years of DFT experience, including at least 2 years in a lead or principal role, and a bachelor's degree in a related field. Deep expertise in memory and logic test, FinFET advanced nodes, and low-power DFT is required.

  Synopsys TestMAX, Siemens Tessent, Cadence Modus, ATE (Automated Test Equipment)

• 29d

  Senior Digital Design Engineer

  Toronto, ON

  

  Astera Labs: Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions.

  2+ YOECandidates need a bachelor's degree in electrical or electronics engineering, 2 to 5 years of digital design experience on complex chips, and hands-on SystemVerilog or Verilog RTL skills. PCIe or Ethernet IP experience and Python or Perl scripting are also required, and candidates must be authorized to work in Canada.

  SystemVerilog, Verilog, Synopsys, Cadence, Python, Perl

13 companies