“Synopsys Custom Compiler” jobs in Canada

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• 7h

  R&D Engineering, Engineer

  Vancouver, BC

  S

  Synopsys

  Candidates need a bachelor's degree in computer science or engineering and 0 to 2 years of software development experience. They need solid C++ skills and understanding of data structures and algorithms.

  Use questioning techniques, Team building, Communication skills, Computer science, Software development, C++

  1mo

  ASIC Physical Design, Sr Staff Engineer - 16724

  Nepean, ON

  S

  Synopsys

  9+ YOECandidates need 9+ years of ASIC physical design experience on complex SoC or test chip projects at advanced nodes. They must know the full physical design flow and tools such as Design Compiler, PrimeTime, IC Compiler II, Calibre and RedHawk, and must be authorized to work in the USA.

  Design Compiler, PrimeTime, IC Compiler II, ICV, Calibre, RedHawk

  1mo

  Principal Physical Design Methodology Engineer

  Markham, ON

  S

  Synopsys

  10+ YOECandidates need a Bachelor's or Master's in Electrical or Computer Engineering and 10+ years of ASIC digital implementation experience. Deep expertise with Fusion Compiler or ICC2, high-speed IP experience, and Tcl and Python scripting are required.

  Fusion Compiler, ICC2, Innovus, PrimeTime, PrimePower, Tcl

• 16h

  CAD Engineer – AMS & Custom Layout

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  Candidates need a bachelor's degree in engineering, computer science or a related field, plus hands-on custom layout experience in Cadence Virtuoso or Synopsys Custom Compiler, including DRC/LVS work. Coding skills, comfort on Linux, and strong communication and problem-solving are needed.

  Cadence Virtuoso, Synopsys Custom Compiler, Spectre, HSPICE, PrimeSim, ADE

• 25d

  Principal Engineer, CAD

  Ottawa, ON

  

  SiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…

  7+ YOECandidates need a BA or BS in electrical engineering, computer science or a related field and at least 7 years of CMOS IC CAD support experience. They must know Cadence, Synopsys and Siemens EDA tools, scripting languages such as SKILL, Python and Tcl, and Linux.

  Cadence Virtuoso, Spectre, Assura, Innovus, Tempus, Synopsys Design Compiler

• 26d

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a computer or electrical engineering degree, experience in 3D-IC and advanced packaging, and hands-on work with Synopsys or Cadence EDA tools. Strong Python, TCL and Perl scripting on Linux, plus experience applying AI or LLMs to CAD or hardware design, are preferred.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Verilog, UPF, Python

• 28d

  Physical Design Engineer - Synth, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOECandidates need 8+ years of ASIC implementation experience, including at least two tapeouts, and strong synthesis and timing-closure experience on large designs. Expertise with Genus or Design Compiler, SDC constraints, Tcl and Python scripting, and advanced process nodes (7nm and below preferred) is required.

  Cadence Genus, Synopsys Design Compiler, Tcl, Python

• 1mo

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in computer or electrical engineering, experience with 3D-IC design and advanced packaging, and hands-on work with Synopsys 3DIC Compiler. Strong scripting skills and experience applying AI to CAD or hardware design are also needed.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Linux/Unix, Python, TCL

• 1mo

  ASIC Verification Engineer (7745)

  Ottawa, ON

  T

  TSMC

  5+ YOECandidates need a master's or PhD in electrical or computer engineering and 5-10 years of digital verification experience. They should be strong in SystemVerilog, UVM, assertions, Unix/Linux and EDA tools such as VCS or Incisive.

  Synopsys VCS, Cadence Incisive, UVM, Unix/Linux

• 1mo

  HW & SW Applications Admin 1

  Toronto, ON

  

  Celestica International LP

  5+ YOECandidates need a bachelor's degree in computer science, software or electrical engineering, or a related field, and 5+ years of enterprise IT or application engineering experience, including 2+ years supporting an R&D engineering team. Hands-on experience with EDA/CAD suites, DevOps tools, license management and Linux and Windows environments is required.

  Azure DevOps, Jira, Git, Docker, Kubernetes, PTC Creo

• 1mo

  SMTS Logic Design

  Montréal, QC

  

  Rambus: As an industry pioneer with over 30 years experience, Rambus is a premier provider of chips & silicon IP.

  8+ YOECandidates need a BS, MS or PhD in electrical or computer engineering, 8+ years of ASIC/SoC logic design experience, and expert SystemVerilog skills. Experience with synthesis, timing closure and PCIe Gen5/Gen6/Gen7 is preferred.

  SystemVerilog, Synopsys Design Compiler, Synopsys Fusion Compiler, Cadence Genus, SpyGlass, Questa

• 1mo

  Senior SoC Design Engineer

  Burnaby, BC

  $86k–$186k/yrFull Time

  MS

  MCHP Semiconductor Canada ULC

  3+ YOECandidates need a Bachelor's or Master's in electrical or computer engineering and 3 to 5 years of related experience, including RTL design in SystemVerilog and Verilog. Experience with ASIC design flows, synthesis, static timing analysis and PCI-Express is valued.

  Synopsys Design Compiler, Cadence Incisive, Verilog, Perl, Python, Tcl

10 companies