Sr. Engineer, Staff Analog Design
Ottawa, ONSiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…
10+ YOECandidates need a Master's or PhD in Electrical Engineering, 10+ years in analog/mixed-signal CMOS design, and PLL design experience. Cadence tools and lab characterization experience are also required.
Cadence, SystemVerilog, Verilog-A
Engineer, Staff Analog Design
Ottawa, ONSiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…
6+ YOECandidates need a Master's or PhD in Electrical Engineering and 6+ years of analog or mixed-signal IC design, including PLL design, CMOS or BiCMOS experience, and hands-on lab characterization.
Cadence, SystemVerilog, Verilog-A, AMS