Principal High-Speed Analog Layout Design Engineer
Ottawa, ONCC
Celero Communications, Inc.
10+ YOECandidates need 10+ years of hands-on analog and mixed-signal layout experience, including advanced FinFET nodes and a record of owning major IP layout macros. They must know verification tools such as Calibre and Pegasus, device physics and layout-dependent effects, and be able to work with international and remote teams.
Cadence Virtuoso, Calibre, Pegasus, SKILL, TCL, Python