Physical Design Engineer, Staff
Toronto, ONQualcomm Canada ULC
7+ YOECandidates need 7+ years of physical design experience and a Bachelor's in Electrical or Computer Engineering or equivalent. Low-power, SoC and advanced technology node experience are desired, along with strong analytical, scripting and collaboration skills.
EDA tools
Engineer
Markham, ONQualcomm Canada ULC
1+ YOECandidates need a bachelor's degree in engineering or a related field, plus 6 months to 2 years of experience in chip design, VLSI or digital design, including internships. They should understand digital logic and timing, know basic physical design steps, and have scripting skills in Python, Tcl, Perl or Shell.
Verilog, SystemVerilog, EDA tools
Firmware Engineer, Edge AI Silicon Validation (Embedded C)
Markham, ONQualcomm Canada ULC
2+ YOECandidates need at least 2 years of embedded firmware or silicon validation experience in C, plus a bachelor's degree and 4 or more years of ASIC validation work (or a master's with 3 years, or a PhD with 2 years). Strong debugging, lab equipment and communication skills are needed.
Oscilloscope, Protocol analyzer, JTAG debugger, FPGA prototyping system, Perforce, Git
FY27 Intern - Display IP Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's program in electrical, computer or engineering science, or a related field, with a graduation date of November 2028 or later. They need programming experience in C, C++ or Python, knowledge of RTL, Verilog or SystemVerilog and digital design, and good communication and teamwork skills.
Verilog, VHDL, Perl, Python, TCL, GNU Make
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ YOECandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL
Camera Design Engineer
Vancouver, BCQualcomm Canada ULC
3+ YOECandidates need a bachelor's, master's or PhD in a computer, electrical or related engineering field, with 4 to 2 years of hardware or related experience depending on degree. Verilog or VHDL RTL design, design verification and bus protocol experience are key.
Verilog, VHDL, TCL, Perl, Python