Senior ASIC RTL Design Engineer, AI Networking IP
Ottawa, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.
Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python
RTL Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a Bachelor's or Master's degree in Electrical or Computer Engineering or Computer Science (Master's preferred), plus proven RTL design and verification experience. Strong Verilog, SystemVerilog, scripting, and bus protocol knowledge (AXI, AHB, AMBA) are expected.
Verilog, Tcl, Ruby, Perl, Python, Makefile
Silicon Design Engineer
Markham, ONAdvanced Micro Devices, Inc
Candidates need a bachelor's degree in electrical or computer engineering, with a master's or PhD preferred. Experience with ASIC hardware and firmware design and verification, C/C++ and SystemVerilog, and bus protocols like AXI and AHB is preferred.
UVM, C-DPI, Verilog, FPGA prototyping platforms, Python, Perl