Optical System Engineer, Senior Staff
Ottawa, ONQualcomm Canada ULC
4+ YOECandidates need proven optical system design and simulation experience, preferably in MATLAB, and extensive hands-on lab testing of optical systems. Knowledge of Silicon Photonics, EAM/EML devices for IM/DD modules and DSP techniques is also required.
MATLAB, BERT, AWG, VNA, Optical boards
DSP Application Engineer, Principal
Ottawa, ONQualcomm Canada ULC
12+ YOECandidates need an electrical engineering degree and years of hardware applications or semiconductor experience, with deep knowledge of PAM4 signaling, DSP equalization, SerDes, Ethernet and optical communications. Hands-on skill with oscilloscopes, BERTs and VNAs, plus Python or C automation, is required.
Oscilloscope, BERT, VNA, Python, C
FY27 Intern - High-Speed Electrical and Optical Systems Validation Co-Op - Canada (4 months)
Ottawa, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's program in engineering or computer science, available January to April or May 2027, with at least 1 year of academic programming experience. Python and object-oriented programming are needed, with Git and lab equipment experience as assets.
Oscilloscope, BERT, Signal analyzer, VNA, AWG, VOA
FY27 Intern - Silicon Validation Internship - Canada (16 months)
Toronto, ONQualcomm Canada ULC
1+ YOEQualcomm Canada needs students in an engineering or computer science bachelor's program, available May/June 2027 to August/September 2028, with 1+ years of programming experience. Lab equipment experience and scripting in Python, Perl, TCL or Shell are preferred.
oscilloscope, multimeter, Python, Perl, TCL, Shell
System Engineer, Application Engineering Principal
Ottawa, ON +1Qualcomm Canada ULC
12+ YOECandidates need a master's or PhD in an engineering or science field and 6 to 12+ years of experience in high-speed communications, DSP or SerDes. Deep knowledge of PAM4 signaling, IEEE 802.3 standards and MATLAB or Python is required.
MATLAB, Python
Cross-Functional Engineer, Staff
Toronto, ON +1Qualcomm Canada ULC
4+ YOECandidates need a bachelor's, master's or PhD in Electrical Engineering with analog or mixed-signal chip design experience and several years of ASIC design or verification work. They also need strong high-speed SerDes knowledge, SystemVerilog and EDA tool skills.
Cadence, SPICE, MATLAB, Verilog, VHDL, SystemVerilog
Application Engineer, Sr Staff
Toronto, ONQualcomm Canada ULC
6+ YOECandidates need a bachelor's degree in electrical or computer engineering plus 6 or more years of hardware experience, or an equivalent advanced degree with fewer years. They need strong debugging skills, C/C++ for embedded systems, and Python for test automation.
Oscilloscope, BERT, Protocol analyzer
Verification Engineer (Engineer–Senior Level)
Toronto, ONQualcomm Canada ULC
2+ YOECandidates need a bachelor's degree in science or engineering with 2+ years of ASIC design or verification experience, or a master's with 1+ year, or a PhD. Strong SystemVerilog and UVM skills, constrained random verification experience and clear communication are required.
SystemVerilog, UVM, Python, Perl, C/C++, GNU Make
FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's degree in electrical or computer engineering, engineering science or computer science, with at least one year of academic programming experience in C, C++ or Python. Strong debugging, problem-solving and teamwork skills are needed, and availability must match the 12- or 16-month internship dates.
Git, Linux, FPGA, Verilog, SystemVerilog, GitHub Actions
Staff Engineer, Physical Design/Implementation
Toronto, ONQualcomm Canada ULC
3+ YOECandidates need a Master's degree with 3+ years or a Bachelor's with 4+ years of ASIC physical design experience. They need hands-on skill with industry chip design tools and strong knowledge of timing, power and clocking.
Cadence Innovus, Synopsys ICC2
Connectivity Systems Engineer, Staff
Toronto, ONQualcomm Canada ULC
5+ YOECandidates need a Master's or PhD with 5 years of relevant experience, plus strong mathematical skills in modelling communication systems at 100+ Gbps. Hands-on programming in MATLAB or Python, and experience turning interconnect and amplifier measurements into system models, are required.
MATLAB, Python
FY27 Intern - Display IP Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's program in electrical, computer or engineering science, or a related field, with a graduation date of November 2028 or later. They need programming experience in C, C++ or Python, knowledge of RTL, Verilog or SystemVerilog and digital design, and good communication and teamwork skills.
Verilog, VHDL, Perl, Python, TCL, GNU Make
FY27 Intern - Edge AI and Display Hardware Architecture Development Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
Qualcomm Canada ULC needs candidates enrolled in an engineering or computer science bachelor's program, available May/June 2027 to August/September 2028 and graduating November 2028 or later. Strong analytical skills, programming in C/C++ or Python, and HW modeling and simulation experience are required.
Verilog, VHDL, C/C++, Python, HW simulation tools, HW CAD tools