“Cadence AMS” jobs in Canada

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• 1d

  Sr/Staff Digital Design Engineer

  Toronto, ON

  

  Lightmatter

  5+ YOELightmatter needs candidates with a bachelor's degree in electrical or computer engineering and at least 5 years of ASIC or high-speed chip design experience, including multiple successful tape-outs. Candidates must know SystemVerilog or Verilog and have proven experience debugging logic and mixed-signal simulations.

  SystemVerilog, Verilog, Synopsys VCS, Cadence Xcelium, Questa

  1mo

  Analog/Mixed Signal Architect

  Toronto, ON

  

  Lightmatter

  Candidates need a PhD in electrical engineering, physics, applied physics or a related analog discipline, plus experience designing optical receivers and transmitters in advanced CMOS. Strong simulation skills in Cadence Virtuoso and Spectre, clear written communication and problem-solving on open-ended problems are also required.

  Cadence Virtuoso, Cadence Spectre, Verilog-A, IBIS-AMI

• 7d

  Cross-Functional Engineer, Staff

  Toronto, ON +1

  On-site

  

  Qualcomm Canada ULC

  4+ YOECandidates need a bachelor's, master's or PhD in Electrical Engineering with analog or mixed-signal chip design experience and several years of ASIC design or verification work. They also need strong high-speed SerDes knowledge, SystemVerilog and EDA tool skills.

  Cadence, SPICE, MATLAB, Verilog, VHDL, SystemVerilog

• 10d

  Gestionnaire de l'évolution client, SAP AMS

  Montréal, QC

  HybridFull Time

  

  Talan

  7+ YOEAu moins sept ans d'expérience pertinente en ERP et en services SAP gérés; Expérience de la gestion de comptes et de la gouvernance client; Maîtrise d'ITIL et de la gouvernance des SLA, connaissance de SAP S/4HANA

  SAP S/4HANA, SAP Joule, RISE with SAP, GROW with SAP

  10d

  Customer Evolution Manager, SAP AMS

  Toronto, ON

  $140k–$200k/yrRemoteFull Time

  

  Talan

  7+ YOECandidates need at least seven years of ERP experience with SAP AMS or managed services, plus ITIL-aligned service management and S/4HANA knowledge. A bachelor's degree is required, with a degree in IT preferred, and strong English communication is needed.

  SAP S/4HANA, SAP Cloud ALM, SAP Solution Manager, SAP Joule

• 12d

  Sr. Vendor & Operations Lead

  Mississauga, ON

  HybridFull Time

  MM

  MCD McKesson Canada Corporation / La Corporation McKesson Canada

  7+ YOECandidates need a Bachelor's degree or equivalent and 7+ years in vendor management, service delivery or operations. Experience with enterprise HCM platforms, ITSM processes, SLAs and cross-functional stakeholder management is required.

  Workday, ADP, UKG, Oracle HCM, SAP SuccessFactors, Ceridian

• 23d

  Analog and Mixed-Signal Modelling Architect (Masters or PhD New Grad)

  Ottawa, ON

  $77k–$149k/yrFull Time

  CC

  Ciena Canada ULC

  Candidates need a post-graduate degree in Physics or Engineering focused on ASIC hardware, communication or control systems, plus an internship, co-op or applied project. They need C++ or SystemC modelling experience and knowledge of analog impairments such as noise, jitter and phase noise.

  C++, SystemC-AMS, Python, MATLAB, Simulink, Cadence Virtuoso

  1mo

  Mixed Signal Design Engineer

  Ottawa, ON

  $93k–$149k/yrFull Time

  CC

  Ciena Canada ULC

  Ciena Canada ULC needs a degree in electrical or computer engineering, computer science or a related science. Candidates need CMOS or BiCMOS design experience and skill with Cadence, Synopsys and Siemens EDA tools, plus SystemVerilog, Verilog-AMS, Python and C/C++.

  Cadence Virtuoso, Cadence Xcelium, Cadence AMS, Synopsys VCS, Synopsys StarRC, Siemens Questa

  1mo

  Senior Analog RF Design Engineer

  Ottawa, ON

  $117k–$187k/yrFull Time

  CC

  Ciena Canada ULC

  5+ YOECiena needs a Master's degree in electrical engineering or equivalent and 5 to 10 years of RF analog circuit design for telecom. Candidates need high-speed RF, op-amp and BiCMOS design experience, plus Cadence and mixed-signal simulation skills.

  Cadence Virtuoso, Cadence AMS, Calibre, HFSS, EMX, VNA

• 23d

  Sr. Engineer, Staff Analog Design

  Ottawa, ON

  

  SiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…

  10+ YOECandidates need a Master's or PhD in Electrical Engineering, 10+ years in analog/mixed-signal CMOS design, and PLL design experience. Cadence tools and lab characterization experience are also required.

  Cadence, SystemVerilog, Verilog-A

  23d

  Engineer, Staff Analog Design

  Ottawa, ON

  

  SiTime Corporation: SiTime Corporation (Nasdaq: SITM), the market leader in silicon MEMS timing, is an analog and semiconductor company that is revolutionizing the…

  6+ YOECandidates need a Master's or PhD in Electrical Engineering and 6+ years of analog or mixed-signal IC design, including PLL design, CMOS or BiCMOS experience, and hands-on lab characterization.

  Cadence, SystemVerilog, Verilog-A, AMS

• 28d

  Senior Analog/mixed-signal IC Developer - Acacia - (Hybrid)

  Kanata, ON +1

  HybridFull Time

  

  Cisco Systems Canada Co.

  8+ YOECandidates need a BSEE or higher engineering degree with substantial experience designing, simulating and measuring high-speed ICs in at least three listed areas, such as serial links, data converters, PLLs and amplifiers.

  Cadence Virtuoso, Spectre, SpectreX, APS, Matlab, EMX

  28d

  Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON

  HybridFull Time

  

  Cisco Systems Canada Co.

  15+ YOECandidates need at least 15 years of related experience (or a master's with 10, or a PhD with 7) and hands-on design, simulation and measurement of high-speed ICs. They must have led a team on high-performance circuits.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  28d

  Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON +1

  HybridFull Time

  

  Cisco Systems Canada Co.

  8+ YOECandidates need a bachelor's with 8 years of related experience, a master's with 6, or a PhD with 3, plus hands-on experience designing, simulating and measuring high-speed ICs in at least three areas such as serial links, output drivers, PLLs, clock distribution, op-amps or equalization. Experience with FinFET/GAA technologies, high-frequency layout and Cadence tools is preferred.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  28d

  Senior Analog/mixed-signal IC Designer - Acacia (Hybrid)

  Kanata, ON

  HybridFull Time

  

  Cisco Systems Canada Co.

  12+ YOECandidates need a BSEE with 12+ years, an MS with 8+ years, or a PhD with 5+ years of experience. They must have high-speed IC design experience in at least three listed areas, such as serial links, PLLs, or equalization.

  Cadence Virtuoso, Spectre, SpectreX, Calibre, EMX, Matlab

  28d

  Senior Mixed-Signal Designer - Acacia (Hybrid)

  Kanata, ON

  HybridFull Time

  

  Cisco Systems Canada Co.

  12+ YOECandidates need a bachelor's with 12 years, a master's with 8, or a PhD with 5 years of related experience, plus hands-on high-speed IC design across at least three areas such as SerDes, PLLs, clock distribution or equalization.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

• 1mo

  Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON +1

  Full Time

  

  Cisco

  8+ YOECandidates need a bachelor's with 8 years, a master's with 6, or a PhD with 3 years of related experience, plus hands-on design, simulation and measurement of high-speed ICs in at least three areas such as SerDes, PLLs, output drivers, clock distribution, amplifiers and equalization.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1mo

  Senior Mixed-Signal Designer - Acacia (Hybrid)

  Kanata, ON

  Full Time

  

  Cisco

  5+ YOECandidates need a degree plus 5 to 12 years of related experience, depending on the degree level, and experience designing, simulating and measuring high-speed ICs across at least three of: SerDes, output drivers, PLLs, clock distribution, op-amps/PGAs or equalization. Experience with FinFET, layout and design tools is preferred.

  Cadence Virtuoso, Spectre/APS/SpectreX, Calibre, EMX, Matlab

  1mo

  Principal Analog/mixed-signal IC Developer - Acacia (Hybrid)

  Kanata, ON

  Full Time

  

  Cisco

  7+ YOECandidates need a Bachelor's with 15 years, a Master's with 10 years, or a PhD with 7 years of related experience. They must have high-speed IC design experience in at least three areas and have led a high-performance circuit team.

  Cadence Virtuoso, Calibre, EMX, Matlab

  1mo

  Senior Analog/mixed-signal IC Designer - Acacia (Hybrid)

  Kanata, ON

  Full Time

  

  Cisco

  12+ YOECisco candidates need 12+ years of experience with a BSEE, 8+ with an MS, or 5+ with a PhD. Experience in high-speed IC design in at least three areas such as SerDes, PLLs, output drivers, equalization and amplifiers is required.

  Cadence Virtuoso, Spectre, Calibre, EMX, Matlab

  1mo

  Senior Analog/mixed-signal IC Developer - Acacia - (Hybrid)

  Kanata, ON +1

  Full Time

  

  Cisco

  12+ YOECandidates need a BSEE with 12+ years of experience, or an equivalent MS or PhD background, plus hands-on design, simulation and measurement of high-speed ICs in at least three areas such as serial links, PLLs, drivers and data converters. Experience with FinFET technology, high-speed layout and Cadence Virtuoso is a plus.

  Cadence Virtuoso, Spectre, SpectreX, APS, Matlab, EMX

• 1mo

  Signal Integrity Intern, MS – 2027 Co-Op

  Toronto, ON

  Full Time

  MS

  Marvell Semiconductor Canada Inc. (MSCI)

  Candidates need to be pursuing a master's degree in electrical engineering, electromagnetics or a related field, graduating between Fall 2027 and Summer 2028. They need signal integrity fundamentals, Python or MATLAB skills, and strong communication skills.

  Ansys 3D Layout, Cadence Sigrity, Python, MATLAB

• 1mo

  Enterprise Marketing Manager, Partnerships

  Toronto, ON

  $99k–$131k/yrRemoteFull Time

  

  Docebo: Imprint: https://www.docebo.com/company/imprint/

  4+ YOECandidates need 4 to 6 years of B2B SaaS marketing experience, including at least 1 to 2 years targeting enterprise buyers with 5,000+ employees. They must have a record of measurable pipeline, partner programs that produced results, and planning field events that led to meetings.

  Salesforce, HubSpot, Outreach, UserGems, Influ2, ReachDesk

• 1mo

  Principal High-Speed Analog Layout Design Engineer

  Ottawa, ON

  CC

  Celero Communications, Inc.

  10+ YOECandidates need 10+ years of hands-on analog and mixed-signal layout experience, including advanced FinFET nodes and a record of owning major IP layout macros. They must know verification tools such as Calibre and Pegasus, device physics and layout-dependent effects, and be able to work with international and remote teams.

  Cadence Virtuoso, Calibre, Pegasus, SKILL, TCL, Python

11 companies