FPGA Developer / FPGA Design Engineer (4G/5G Radio – Datapath / RU FPGA Design)
Ottawa, ONContract
Myticas Consulting
1+ YOECandidates need strong FPGA and DSP fundamentals, SystemVerilog and MATLAB/Simulink experience, and knowledge of AXI and Ethernet. Radio protocol knowledge such as O-RAN, eCPRI and PTP is desirable, and 1 to 5 years of experience is encouraged.
Altera Quartus, MATLAB, Simulink, SystemVerilog
FPGA Design & Validation Engineer – 4G/5G Radio
Ottawa, ONContract
Myticas Consulting
7+ YOECandidates need proven FPGA and RTL design experience, expertise in NR, LTE, eCPRI, CPRI and PTP protocols, and knowledge of the O-RAN ecosystem. Experience with UVM, Git and tools like Quartus, Vivado and MATLAB/Simulink is also required.
Quartus, Vivado, MATLAB/Simulink, HDL Coder, Git, GitHub