ASIC Development Technical Leader
Vancouver, BCFull Time
Cisco
8+ YOECandidates need a bachelor's degree in electrical or computer engineering with 8+ years of ASIC design experience, or a master's with 6+ years, or a PhD with 3 years. Prior scan insertion, ATPG, Tessent and gate-level simulation experience is required.
Tessent, VCS, ATE, SDF
ASIC Development Technical Leader
Vancouver, BCFull Time
Cisco
8+ YOECandidates need a bachelor's degree in electrical engineering with 8+ years of physical design experience (or a master's with 6+ years, or a PhD with 3+ years), plus hands-on RTL-to-GDSII tapeout experience at 7nm or smaller nodes and EDA tool experience.
Innovus, Tempus, PrimeTime, Redhawk, Voltus, Calibre