System Level Test Engineer - 18758
Ottawa, ONSynopsys
3+ YOECandidates need a bachelor's or master's degree in electrical or computer engineering or a related field, plus 3 to 5 years of silicon validation or memory interface lab debug. They need hands-on bring-up experience, DRAM protocol knowledge, and Python scripting skills.
oscilloscope, logic analyzer, protocol analyzer, BERT, VNA, Power Analyzer
Silicon Validation/Characterization Engineer - 18757
Nepean, ONSynopsys
3+ YOECandidates need a Bachelor's or Master's in electrical or computer engineering or a related field, plus 3+ years of semiconductor validation or characterization experience. They need knowledge of DDR/LPDDR/HBM protocols and lab instruments, and skill in Python or C/C++ scripting.
oscilloscope, logic analyzer, power analyzer, SMU, pattern generator, Automated Test Equipment (ATE)
Analog Design, Sr Staff Engineer - 18597
Ottawa, ONSynopsys
7+ YOECandidates need an engineering or applied science degree and 7 to 12 years of semiconductor, Silicon IP or SoC experience. Strong project management, customer communication and cross-functional leadership skills are required, along with familiarity with Linux environments.
Linux
Project Engineering Management, Principal Engineer
Mississauga, ONSynopsys
10+ YOECandidates need an engineering degree or equivalent experience, 10+ years of customer-facing project management, and familiarity with mixed-signal IP, SoC or ASIC development. Strong communication, MS Project, Jira, UNIX/Linux and quality management system knowledge are also required.
MS Project, Jira, UNIX, Linux
Sr Staff Package Design Engineer
Nepean, ONSynopsys
10+ YOECandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.
Ansys HFSS, EDA tools, Windows, Linux
Sr Staff PCB Design Engineer
Markham, ONSynopsys
10+ YOECandidates need 10+ years of high-speed PCB design or signal integrity experience and strong circuit and transmission line theory. They also need hands-on 3D electromagnetic modelling experience with Ansys HFSS or similar tools, plus a Bachelor's degree in electrical or electronics engineering.
Ansys HFSS, PCB layout tools, Windows, Linux
ASIC Digital Verification, Sr. Manager
Mississauga, ONSynopsys
15+ YOECandidates need a BS or MS in EE, EC or VLSI with 15+ years of IP or SoC verification experience, and strong team leadership. They must know Verilog, SystemVerilog and UVM, and Perl or Python automation. PCIe and Ethernet knowledge is an asset.
Verilog, SystemVerilog, UVM, Perl, Python