“AI EDA tools” jobs in Canada – Page 3

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• 1mo

  Printed Circuit Board PCB Design and Layout Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need extensive experience designing complex printed circuit boards in tools such as Cadence Allegro, Altium or Zuken, plus a Bachelor's or Master's degree in electrical or computer engineering. Strong high-speed routing and fabrication knowledge is preferred.

  Cadence Allegro, OrCAD, Altium, Zuken, PADS, ODB++

  1mo

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need hands-on place-and-route experience on complex or advanced-node designs, proficiency with Synopsys Fusion Compiler, Cadence and Siemens EDA tools, and scripting in TCL, Perl or Shell. A bachelor's or master's degree in electrical or computer engineering is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

  1mo

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  1mo

  STA/Constraints Engineer

  Vancouver, BC

  Full Time

  AI

  AMD, Inc.

  Candidates need industry experience in STA, constraints and timing signoff, and expert use of Synopsys PrimeTime and GCA (ICC2 or Fusion Compiler desired). Scripting in Perl, TCL, Shell or Python and Verilog RTL experience are valued.

  ICC2, Verilog

• 1mo

  Physical Design Engineer Intern (Toronto)

  Toronto, ON

  AL

  Astera Labs Early Career - North America 2027

  Candidates need to be pursuing a bachelor's or master's degree in electrical, computer or a related engineering field. Coursework or hands-on experience with VLSI, digital logic and timing concepts, plus Unix/Linux and a scripting language such as Tcl or Python, is needed.

  Innovus, PrimeTime, Genus, Calibre, Voltus, Tcl

  1mo

  DFT Engineering Intern

  Toronto, ON

  $35–$55/hr

  AL

  Astera Labs Early Career - North America 2027

  Candidates need coursework or hands-on experience in electrical or computer engineering or a related field, and an understanding of digital logic and RTL. Programming in Verilog, SystemVerilog, Python, Tcl, Perl, C or C++ is needed, plus comfort in a Linux environment.

  Verilog, SystemVerilog, Python, Tcl, Perl, Linux

• 1mo

  ASIC Design Engineer, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOECandidates need a BS or MS in electrical or computer engineering with 8+ years of ASIC or SoC RTL design experience. They need deep SystemVerilog skills, front-end EDA tool expertise, and hands-on work with at least three of HBM/DDR, PCIe/CXL, AMBA AXI/ACE/CHI, cache hierarchies, or high-throughput datapaths.

  SystemVerilog, Python, Tcl, Make, UVM, cocotb

  1mo

  Physical Design Engineer - Synth, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOECandidates need 8+ years of ASIC implementation experience, including at least two tapeouts, and strong synthesis and timing-closure experience on large designs. Expertise with Genus or Design Compiler, SDC constraints, Tcl and Python scripting, and advanced process nodes (7nm and below preferred) is required.

  Cadence Genus, Synopsys Design Compiler, Tcl, Python

• 1mo

  Staff / Principal AI Developer

  Remote in Canada

  RemoteFull Time

  

  cadstrom.io

  6+ YOECandidates need 6+ years building AI/ML systems with multiple production launches they led, deep practical LLM experience including prompt engineering, RAG and eval design, and TypeScript proficiency. Cadstrom.io also expects strong architectural judgment, mentorship ability, and clear communication with engineers and executives.

  TypeScript, MCP, LangSmith, LangGraph, DSPy, AWS

• 1mo

  Staff Applications Engineer (Electronics Thermal Management)

  Canada

  S

  Synopsys

  4+ YOECandidates need a master's in mechanical engineering with 6+ years in engineering software, or a bachelor's with 8+ years, or a PhD with 3+ years. They also need 4+ years of customer-facing application engineering, strong CFD and thermodynamics skills, and hands-on Ansys experience.

  Ansys Fluent, Ansys Icepak, Ansys Mechanical

  1mo

  Principal Physical Design Methodology Engineer

  Markham, ON

  S

  Synopsys

  10+ YOECandidates need a Bachelor's or Master's in Electrical or Computer Engineering and 10+ years of ASIC digital implementation experience. Deep expertise with Fusion Compiler or ICC2, high-speed IP experience, and Tcl and Python scripting are required.

  Fusion Compiler, ICC2, Innovus, PrimeTime, PrimePower, Tcl

  1mo

  Product Management , Staff

  Vancouver, BC

  S

  Synopsys

  5+ YOECandidates need a technical degree or equivalent experience and at least five years of product management in photonics, optics or simulation software. They should understand photonic design workflows and simulation methods such as FDTD, and have experience with tools like OptoCompiler or Lumerical.

  OptoCompiler, Lumerical

  1mo

  Sr Staff Package Design Engineer

  Nepean, ON

  S

  Synopsys

  10+ YOECandidates need 10+ years of semiconductor package design or electrical modeling experience and a bachelor's degree in electrical or electronics engineering. They must have strong skills in circuit theory, 3D EM modeling in Ansys HFSS, and clear communication in English.

  Ansys HFSS, EDA tools, Windows, Linux

• 1mo

  Researcher - Technology Strategist

  Markham, ON +3

  $85k–$184k/yrOn-siteContract

  

  Huawei Technologies Canada Co., Ltd.

  Candidates need a PhD in computing architecture, software architecture or a related field, plus knowledge of AI EDA tools, LLMs and AI-computing networks. Strong literature review, technology summary and presentation skills are essential.

  AI EDA tools

• 1mo

  3D IC and ADVANCED PACKAGING CAD ENGINEER

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in computer or electrical engineering, experience with 3D-IC design and advanced packaging, and hands-on work with Synopsys 3DIC Compiler. Strong scripting skills and experience applying AI to CAD or hardware design are also needed.

  Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Linux/Unix, Python, TCL

  1mo

  Printed Circuit Board PCB Design and Layout Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need extensive experience designing complex printed circuit boards with industry PCB design tools such as Cadence Allegro, Altium or Zuken. A bachelor's or master's degree in electrical or computer engineering or a related field is expected, along with the ability to take technical ownership.

  Cadence Allegro, OrCAD, Altium, Zuken, PADS, ODB++

  1mo

  Validation Lead-Fuse/SoC

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a bachelor's or master's degree in electrical or computer engineering, plus silicon bring-up, eFuse or non-volatile memory experience. Strong scripting in Python, Perl or Tcl and cross-functional communication are also required.

  Python, Perl, Tcl, C, C++, SQL

  1mo

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

  1mo

  Lead Physical Design Engineer, Place & Route

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need deep hands-on place-and-route experience on complex chip designs, including timing closure and physical verification. Experience with Synopsys Fusion Compiler, Cadence and Siemens EDA tools, plus TCL, Perl or Shell scripting, is preferred, and a Bachelor's or Master's degree in electrical or computer engineering is preferred.

  Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell

  1mo

  STA/Constraints Engineer

  Vancouver, BC

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need industry experience in static timing analysis, constraints and timing signoff, plus expert use of Synopsys PrimeTime and GCA. Scripting in Perl, TCL, Shell or Python, and a degree in microelectronics or a related field, are preferred.

  GCA, ICC2, Verilog, Perl, TCL, Python

  1mo

  Standard Cell Design Enablement Lead

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need deep knowledge of semiconductor device physics and fabrication, plus strong analytical skills and excellent English communication. Advanced Micro Devices prefers experience with EDA tools, layout analysis and scripting in Perl or Python, and an MSEE or MSCS.

  SNPS, CDNS, Siemens EDA tools, Virtuoso, PEX, Perl

• 1mo

  Firmware Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  6+ YOECandidates need a bachelor's, master's or PhD in a related field plus 4, 3 or 2 years of software engineering experience respectively, and 6+ years with embedded systems and strong C/C++ and Python skills. Hands-on lab bring-up and debugging experience with high-speed signals and protocols such as PCIe and Ethernet is expected.

  oscilloscope, JTAG debugger, EDA tools, Jira, Confluence

  1mo

  Digital Design Verification Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOECandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.

  Verilog, SystemVerilog, UVM, Python, Perl, C/C++

  1mo

  Firmware Engineer – SerDes PHY (all levels)

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.

  JTAG debuggers, git, Verilog, SystemVerilog

8 companies