FY27 Intern - Soft IP ASIC Engineering Internship - Canada (12 or 16 months)
Ottawa, ONQualcomm Canada ULC
1+ YOEQualcomm Canada needs candidates studying toward a bachelor's degree in electrical, computer or engineering science, or computer science. They need scripting experience in Python, Perl, TCL or Unix/Linux shell, plus source control experience with SVN, CVS or RCS.
Verilog, SystemVerilog, UVM, SVN, CVS, RCS
FY27 Intern - Softip Engineering Co-Op - Canada (4 months)
Ottawa, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's or master's program in electrical, computer or related engineering, with scripting experience in Python, Perl, TCL or Unix/Linux shell and experience with source code revision systems.
Verilog, SystemVerilog, UVM, VHDL, SVN, CVS
Customer Program Manager, Staff
Toronto, ONQualcomm Canada ULC
5+ YOECandidates need a relevant engineering or computer science degree and 5+ years of program management experience. Schedule tools such as MS Project, JIRA and Confluence, and PMP certification, are assets.
MS Office Project, JIRA, Confluence
FY27 Intern - Firmware/Embedded Software Engineering Internship - Canada (12 or 16 months)
Toronto, ONQualcomm Canada ULC
1+ YOECandidates need to be enrolled in a bachelor's degree in electrical or computer engineering, engineering science or computer science, with at least one year of academic programming experience in C, C++ or Python. Strong debugging, problem-solving and teamwork skills are needed, and availability must match the 12- or 16-month internship dates.
Git, Linux, FPGA, Verilog, SystemVerilog, GitHub Actions
Physical Design Engineer, Staff
Toronto, ONQualcomm Canada ULC
7+ YOECandidates need 7+ years of physical design experience and a Bachelor's in Electrical or Computer Engineering or equivalent. Low-power, SoC and advanced technology node experience are desired, along with strong analytical, scripting and collaboration skills.
EDA tools
FY27 Intern - Camera HW ASIC Verification Intern - Canada (12 or 16 months)
Vancouver, BCQualcomm Canada ULC
1+ YOECandidates need Verilog or SystemVerilog skills, ASIC design verification experience and scripting ability. Study toward a bachelor's degree in electrical, computer or a related engineering field is required.
Verilog, UVM, Python, Perl
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ YOECandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL