“PrimeTime” jobs in Canada

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• 17d

  Sr. Staff Physical Design Engineer

  Vancouver, BC

  Full Time

  AM

  Advanced Micro Devices, Inc

  AMD needs candidates with strong physical design experience for high-performance semiconductors, including timing closure and signoff. Candidates should know tools such as ICC2, Fusion Compiler, PrimeTime, Calibre and Innovus, and be proficient in Python and TCL.

  Synopsys ICC2, Synopsys ICC, Fusion Compiler, PrimeTime, StarRC, Mentor Graphics Calibre

  28d

  Physical Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  AMD needs candidates with a bachelor's degree in electrical, electronics or computer engineering and expertise in ASIC physical design, place-and-route, timing closure and physical verification. They must be able to debug CAD flow issues with industry tools and optimize power, performance and area.

  Synopsys ICC2, Innovus, PrimeTime, Spyglass, RedHawk, VSI

  28d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with proven SoC implementation and tapeout experience, deep knowledge of equivalence checking and low power verification, and hands-on use of industry EDA tools. Strong scripting, debugging, leadership and communication skills are also required, along with a BS or MS in Electrical Engineering, ECE, EEE or a related field.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 17d

  Sr. Staff Physical Design Engineer

  Vancouver, BC

  Full Time

  AI

  AMD, Inc.

  Candidates need strong experience in high-performance physical design, timing closure and physical signoff, plus proficiency in Python and TCL for flow automation. Experience leading engineers and an electronics or electrical engineering background are preferred.

  Synopsys ICC2, Fusion Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache RedHawk

  23d

  Physical Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a bachelor's degree in an electrical, electronics or computer engineering discipline and deep experience in ASIC physical design implementation and signoff. They also need hands-on skill with industry EDA tools and power, performance and area optimization.

  Synopsys ICC2, Cadence Innovus, PrimeTime, Spyglass, RedHawk, Calibre

  23d

  SoC Lead Engineer – LEC & Low Power Signoff

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.

  Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler

• 22d

  Broadcast Technician

  Hamilton, ON

  $28.32–$39.33/hrPart Time

  CZ

  CHANNEL ZERO INC.

  2+ YOECandidates need a diploma or degree in broadcast engineering, electronics, IT or a related field, plus 2-3 years of live television technical experience. They need strong HD/SDI, audio routing and IP networking knowledge, and must be available around the clock and hold a valid Ontario driver's licence.

  Studio cameras, Production switchers, Audio consoles, Graphics systems, Routing switchers, ENG equipment

  22d

  Production Assistant

  Hamilton, ON

  Part Time

  CZ

  CHANNEL ZERO INC.

  1+ YOECandidates need at least six months of live news production experience, a broadcast diploma or equivalent, and a valid driver's licence with a clean record. Strong organization, spelling and grammar skills and knowledge of local current events are expected.

  ENPS, Adobe Premiere Pro, WordPress

  22d

  Video Journalist

  Hamilton, ON

  Part Time

  CZ

  CHANNEL ZERO INC.

  1+ YOECandidates need video editing skills, at least six months of video journalism experience, and a journalism diploma or degree. Strong writing, interviewing, social media and live broadcast skills are also required, along with a valid driver's licence.

  ENG equipment, Adobe Premiere Pro, ENPS

• 22d

  Staff Physical Design Engineer

  Toronto, ON

  T

  Talentlab

  5+ YOECandidates need 5+ years of physical design experience on digital ASICs, including advanced nodes like TSMC N5, N4P or N3. They must know industry EDA tools, PnR, timing analysis and physical verification, and be strong in TCL, Python or Perl.

  Synopsys ICC2, Cadence Innovus, Calibre, PrimeTime, RedHawk, TCL

  22d

  Staff ASIC Design Engineer – AI/ML Hardware IP

  Toronto, ON

  T

  Talentlab

  5+ YOECandidates need at least 5 years of hands-on ASIC design experience and strong skills in Verilog, SystemVerilog, and logic synthesis. A degree in electrical or computer engineering is required, and candidates must be legally authorized to work on-site in Canada.

  Verilog, SystemVerilog, Design Compiler, PrimeTime, Formality, Spyglass

  22d

  Senior Staff ASIC Design Egineer - AI/ML Hardware IP

  Toronto, ON

  T

  Talentlab

  6+ YOECandidates need six or more years of ASIC design and integration experience (or a Master's plus five years, or a PhD plus four), strong Verilog/SystemVerilog skills, and experience owning complex SoC blocks. A Bachelor's, Master's or PhD in electrical engineering or a related field is required, and the candidate must be legally authorized to work in Canada.

  Verilog, SystemVerilog, VCS, Verdi, Questa, Xcelium

• 23d

  Physical Design Engineer Intern (Toronto)

  Toronto, ON

  AL

  Astera Labs Early Career - North America 2027

  Candidates need to be pursuing a bachelor's or master's degree in electrical, computer or a related engineering field. Coursework or hands-on experience with VLSI, digital logic and timing concepts, plus Unix/Linux and a scripting language such as Tcl or Python, is needed.

  Innovus, PrimeTime, Genus, Calibre, Voltus, Tcl

• 25d

  ASIC Physical Design Engineer, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  5+ YOECandidates need 5 to 8 years of physical design experience and at least one advanced-node tapeout. Strong Innovus or ICC2 skills and knowledge of timing, power and clock tree synthesis are required.

  Innovus, ICC2, Tempus, PrimeTime, Voltus, RedHawk

• 27d

  ASIC Physical Design, Sr Staff Engineer - 16724

  Nepean, ON

  S

  Synopsys

  9+ YOECandidates need 9+ years of ASIC physical design experience on complex SoC or test chip projects at advanced nodes. They must know the full physical design flow and tools such as Design Compiler, PrimeTime, IC Compiler II, Calibre and RedHawk, and must be authorized to work in the USA.

  Design Compiler, PrimeTime, IC Compiler II, ICV, Calibre, RedHawk

  27d

  Principal Physical Design Methodology Engineer

  Markham, ON

  S

  Synopsys

  10+ YOECandidates need a Bachelor's or Master's in Electrical or Computer Engineering and 10+ years of ASIC digital implementation experience. Deep expertise with Fusion Compiler or ICC2, high-speed IP experience, and Tcl and Python scripting are required.

  Fusion Compiler, ICC2, Innovus, PrimeTime, PrimePower, Tcl

• 27d

  Sr. Manager, Physical Design Engineering, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  10+ YOE5+ MgmtAmazon Development Centre Canada needs 5+ years leading physical design teams of 8+ engineers and 10+ years of hands-on ASIC/SoC physical design across advanced nodes. Candidates must master both Synopsys and Cadence EDA tools, advanced STA and power integrity, and hierarchical flows for very large SoCs.

  Synopsys Fusion Compiler, ICC2, PrimeTime, StarRC, RedHawk-SC, Cadence Innovus

• 29d

  Senior Physical Design Engineer - P&R

  Ottawa, ON

  RemoteFull Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  8+ YOECandidates need 8 or more years of ASIC digital place-and-route experience, recent hands-on work with Synopsys and Cadence tools, and knowledge of advanced FinFET nodes. Scripting skills and strong written communication for remote teamwork are also required.

  Synopsys, Cadence, PrimeTime, StarRC, RedHawk, Calibre

• 29d

  Static Timing Analysis (STA) Engineer

  Toronto, ON

  Full Time

  A

  Altera

  6+ YOECandidates need 6+ years of static timing analysis experience on ASIC or FPGA designs, plus a strong grasp of STA fundamentals and tools such as PrimeTime. A bachelor's or master's degree in electrical or computer engineering, with RTL design knowledge, is required.

  PrimeTime, Verilog, SystemVerilog, Tcl, Python

• 29d

  Physical Design Methodology Engineer, AI HW IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ YOECandidates need 5+ years developing or supporting physical design methodology or CAD flows in production. They need expertise with industry EDA tools, scripting in Tcl, Python or Perl, and knowledge of advanced node methodology, low-power design and signoff.

  FusionCompiler, ICC2, Innovus, Genus, PrimeTime, RedHawk

  29d

  Physical Design Engineer, AI Accelerator IP

  Toronto, ON

  

  Tenstorrent: Tenstorrent is a next-generation computing company that builds computers for AI.

  5+ YOECandidates need a BS, MS or PhD in electrical, computer or computer science engineering, plus 5+ years of block-level or IP physical design through tapeout. Strong knowledge of advanced-node low-power design and signoff, and proficiency with Innovus, ICC2 or FusionCompiler, PrimeTime and scripting, are required.

  Innovus, ICC2, FusionCompiler, PrimeTime

11 companies