Maximum performance. Absolute area efficiency. No compromise. A general-purpose CPU core designed to excel everywhere—from core infrastructure to advanced AI systems, including the continuous demands of agentic computing. This is not iteration, it is a complete rewrite of the rules of silicon.
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NUVACORE is building a new class of CPU for the AI era, designed for maximum performance, efficiency, and scale.
Maximum performance. Absolute area efficiency. No compromise. A general-purpose CPU core designed to excel everywhere—from core infrastructure to advanced AI systems, including the continuous demands of agentic computing. This is not iteration, it is a complete rewrite of the rules of silicon.
NUVACORE has 9 open jobs in Canada as of November 6, 2026. Top locations: Markham.
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NUVACORE
5+ YOECandidates need a bachelor's degree in electrical or computer engineering and 5+ years of high-speed board design experience. They must know schematic and PCB tools, high-speed interfaces, power delivery, and hands-on lab debugging.
Cadence Allegro, OrCAD, Concept HDL, Altium Designer, oscilloscope, logic analyzer
NUVACORE
20+ YOECandidates need 20+ years of SoC or system architecture experience from definition through production. Deep knowledge of coherent interconnects, cache hierarchies, DDR/LPDDR memory controllers, PCIe/CXL and die-to-die links is required, along with an MS or PhD or equivalent experience.
Scheduling, Translation, Packaging, RTL, Firmware, Communication skills
NUVACORE
4+ YOECandidates need a degree in electrical or computer engineering, computer science or mathematics, or equivalent experience. They must have hands-on formal verification experience, strong SystemVerilog and assertion skills, CPU microarchitecture knowledge and Python scripting.
SystemVerilog, Verilog, Cadence JasperGold, Synopsys VC Formal, Siemens Questa Formal, Python
NUVACORE
4+ YOECandidates need a degree in electrical or computer engineering or computer science (or equivalent experience), 4+ years (Senior) or 15+ years (Principal) of design verification, CPU microarchitecture knowledge, and skill in C/C++ or SystemVerilog plus Python.
SystemVerilog, C/C++, Python, Perl, FPGA
NUVACORE
15+ YOE5+ MgmtNUVACORE needs a leader with a Bachelor's or Master's in computer or electrical engineering or computer science, 15+ years in system software validation or firmware, and 5+ years managing teams. Candidates need deep C/C++, CPU architecture, Linux internals and cross-layer debugging skills.
Git, GitHub, GitLab, LLVM, GCC, JTAG debuggers
NUVACORE
8+ YOECandidates need an MS in computer architecture or a related field and deep expertise in CPU performance modelling. They must have years of C++ simulator work, strong C++ and Python or Perl skills, and proven results from pathfinding through silicon.
gem5, C++, Python, Perl
NUVACORE
7+ YOECandidates need a BS or MS with 15+ years of CPU design experience for leads or 7+ years for individual contributors. They must know Verilog, simulation and logic and physical design, and understand RISC-V, ARM64 or x86 ISAs.
Verilog, AI tools for RTL coding, simulation tools, emulation
NUVACORE
4+ YOECandidates need a degree in electrical or computer engineering, computer science or equivalent experience, plus 4+ years (Senior) or 15+ years (Principal) of design verification. They need strong CPU architecture knowledge, one modern ISA (x86, ARM or RISC-V), and skill in C/C++/Rust or SystemVerilog with Python.
SystemVerilog, Python, Perl, FPGA
NUVACORE
15+ YOECandidates need 15+ years of professional compiler internals experience in LLVM and/or GCC, strong backend knowledge, and low-level programming on x86, ARM or RISC-V. NUVACORE also expects experience debugging complex systems, performance analysis of JIT and multi-language environments, and strong communication skills.
LLVM, GCC, binutils, QEMU
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