System Level Test Engineer - 18758
Ottawa, ONS
Synopsys
3+ YOECandidates need a bachelor's or master's degree in electrical or computer engineering or a related field, plus 3 to 5 years of silicon validation or memory interface lab debug. They need hands-on bring-up experience, DRAM protocol knowledge, and Python scripting skills.
oscilloscope, logic analyzer, protocol analyzer, BERT, VNA, Power Analyzer
Hardware Validation Engineer, Sr Staff
Nepean, ONS
Synopsys
6+ YOECandidates need 6-8+ years of high-speed hardware design and validation experience and expert Cadence Allegro skills. They also need strong signal integrity knowledge, bench debugging experience and familiarity with JTAG, I2C, SPI and UART interfaces.
Cadence Allegro, logic analyzer, oscilloscope, VNA, spectrum analyzer, protocol analyzer