Digital Design Verification Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ YOECandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.
Verilog, SystemVerilog, UVM, Python, Perl, C/C++
Firmware Engineer – SerDes PHY (all levels)
Toronto, ONQualcomm Canada ULC
6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.
JTAG debuggers, git, Verilog, SystemVerilog
FY27 Intern - PAL Firmware Development Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
Qualcomm Canada ULC needs students pursuing a bachelor's degree in engineering, computer science or a related field, with strong C and Python skills, embedded and RTOS knowledge, and debugging ability. Computer architecture knowledge and clear communication are also needed.
C, Python, Ansible, Chef, GitLab, Jira
Machine Learning Engineer, Frameworks & Performance (New Grad to Principal level)
Markham, ONQualcomm Canada ULC
6+ YOECandidates need a degree in computer science, engineering or a related field and 6 to 8+ years of relevant engineering experience, depending on degree level. Strong algorithm development, performance analysis, C++ and Python skills are essential, with compiler, PyTorch or ONNX knowledge as assets.
C++, Python, PyTorch, ONNX, git, Jenkins
Connectivity Project Engineer, Principal
Toronto, ONQualcomm Canada ULC
8+ YOE5+ MgmtCandidates need a university degree in science or engineering and 6 to 8+ years of ASIC design or validation experience, depending on degree level. They also need more than 5 years in technical leadership, experience with high-performance SoCs and SerDes, and strong communication skills.
Teamwork, Design hardware, Firmware, Regulatory compliance, Communication skills, Decision making
Clocking Systems Engineer, Staff
Toronto, ONQualcomm Canada ULC
4+ YOEQualcomm Canada ULC needs a bachelor's degree with 4+ years, a master's with 3+ years, or a PhD with 2+ years of systems engineering experience. Candidates need clocking, mixed-signal, SerDes or PLL/CDR experience, and skills in MATLAB, Python or SystemVerilog.
MATLAB, Python, SystemVerilog