“RTL Architect” jobs in Canada – Page 2

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• 27d

  GPU Design Verification Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need experience with IP-level ASIC verification, UVM testbenches, Verilog and SystemVerilog, and scripting in Python or Perl. Advanced Micro Devices prefers a Bachelor's or Master's in computer or electrical engineering.

  Verilog, UVM, C/C++, Perl, Python, Makefile

  28d

  Firmware Engineering Manager

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need engineering management experience building teams and deep GFX or SOC architecture and debug skills. They also need hands-on C and assembly firmware experience and a degree in electrical or computer engineering or computer science.

  JTAG, logic analyzer, oscilloscope, Palladium, Veloce, Python

  1mo

  Sr. Manager - RTL Design Manager

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a proven record of engineering leadership and IP or RTL team management. They need strong Verilog/SystemVerilog skills, knowledge of ASIC design flows and a Bachelor's degree in engineering or computer science.

  Verilog, SystemVerilog, AMBA, AXI, AHB

  1mo

  Diagnostics Software/Hardware Technical Lead

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need industry experience in silicon engineering, such as post-silicon validation or test generation, plus strong C/C++ and Python skills. A Bachelor's, Master's or PhD in an engineering or computer science field is required.

  STIL, WGL, GitHub, CI/CD pipelines

  1mo

  RTL/Firmware Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's degree in computer engineering, electrical engineering, computer science or a related field. Preferred skills include embedded C/C++, Verilog or SystemVerilog, Python scripting, computer architecture and hands-on use of AI coding tools.

  Verilog, SystemVerilog, Python, Perl, Git, Perforce

• 27d

  GPU Design Verification Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need IP-level ASIC verification experience, UVM testbench skills, and knowledge of SystemVerilog, Verilog, C/C++ and scripting in Python, Perl or shell. A Bachelor's or Master's in computer or electrical engineering is preferred.

  UVM, Verilog, C++, Python, Perl, Makefile

  28d

  Firmware Engineering Manager

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a background in semiconductor firmware or embedded systems, with engineering management experience and a record of building teams. Deep GFX/SOC architecture and debug skills, plus hands-on C and assembly firmware experience, are required.

  JTAG, Palladium, Veloce, Logic analyzer, Oscilloscope, Python

  29d

  Diagnostics Software/Hardware Technical Lead

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  8+ YOECandidates need a background in silicon engineering, such as post-silicon validation, product engineering or test generation, plus strong C/C++ and Python skills. A degree in electrical engineering, computer engineering, computer science or a related field is expected.

  STIL, WGL, GitHub, CI/CD

  29d

  RTL/Firmware Design Engineer

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  Candidates need a Bachelor's or Master's in computer engineering, electrical engineering, computer science or a related field. Embedded C/C++, reading Verilog or SystemVerilog, Python scripting and analytical problem-solving are preferred.

  Verilog, SystemVerilog, Git, Perforce, Jenkins, Python

  29d

  STA/Constraints Engineer

  Vancouver, BC

  Full Time

  AI

  AMD, Inc.

  Candidates need industry experience in STA, constraints and timing signoff, and expert use of Synopsys PrimeTime and GCA (ICC2 or Fusion Compiler desired). Scripting in Perl, TCL, Shell or Python and Verilog RTL experience are valued.

  ICC2, Verilog

  29d

  Sr. Manager - RTL Design Manager

  Markham, ON

  Full Time

  AI

  AMD, Inc.

  AMD needs a leader with experience managing IP or RTL design teams and strong Verilog/SystemVerilog skills. Candidates should know RTL microarchitecture, ASIC verification flows and on-chip protocols such as AXI and AHB, and hold a bachelor's degree in an engineering or computer discipline.

  Verilog, SystemVerilog

• 28d

  Staff Design Verification Engineer

  Toronto, ON

  T

  Talentlab

  9+ YOECandidates need a Bachelor's or Master's in computer science, electrical engineering or a related field, plus at least 9 years of ASIC design verification experience. Strong SystemVerilog and UVM skills and advanced debugging are required.

  SystemVerilog, UVM, EDA tools

  28d

  Staff ASIC Design Engineer – AI/ML Hardware IP

  Toronto, ON

  T

  Talentlab

  5+ YOECandidates need at least 5 years of hands-on ASIC design experience and strong skills in Verilog, SystemVerilog, and logic synthesis. A degree in electrical or computer engineering is required, and candidates must be legally authorized to work on-site in Canada.

  Verilog, SystemVerilog, Design Compiler, PrimeTime, Formality, Spyglass

• 29d

  Transportation Safety Manager

  Mississauga, ON

  $85k–$105k/yrHybridFull Time

  

  Migrate Corp: Migrate, based in Jordan, is a leading business knowledge and networking company that provides innovative business support to its clients in the…

  15+ YOECandidates need fleet safety experience, COR auditing skills, root cause analysis ability and training facilitation experience.

  Assembly, Kubernetes, Amazon Data Pipeline, COBOL, Payroll, React

• 1mo

  ASIC Physical Design Engineer - DFT, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOEPositron AI needs 8+ years of ASIC development with several production tapeouts, deep DFT experience, and hands-on Siemens Tessent. Candidates also need Verilog/SystemVerilog RTL skills, synthesis and gate-level verification, and scripting in Python, Tcl or Perl.

  Siemens Tessent, Verilog, SystemVerilog, Python, Tcl, Perl

  1mo

  ASIC Design Engineer, Senior

  Remote in Canada

  RemoteFull Time

  

  Positron AI

  8+ YOECandidates need a BS or MS in electrical or computer engineering with 8+ years of ASIC or SoC RTL design experience. They need deep SystemVerilog skills, front-end EDA tool expertise, and hands-on work with at least three of HBM/DDR, PCIe/CXL, AMBA AXI/ACE/CHI, cache hierarchies, or high-throughput datapaths.

  SystemVerilog, Python, Tcl, Make, UVM, cocotb

• 1mo

  Senior Firmware Developer

  Waterloo, ON

  Full Time

  

  onsemi: With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety,…

  3+ YOECandidates need a Bachelor's or Master's degree in an engineering discipline and 3-5 years of embedded firmware experience. Strong embedded C, microprocessor and communication protocol knowledge (UART, I2C, SPI, USB) and experience with AI-assisted development tools are required.

  Git, JIRA, FPGA, oscilloscope, logic analyzer, hardware debugger

• 1mo

  Hardware Designer

  Remote in Canada

  $95k–$145k/yrRemoteFull Time

  

  Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…

  5+ YOECandidates need at least 5 years of electronics design experience and a degree in electrical or computer engineering. Strong knowledge of high-speed circuits, multi-layer PCB design and high-speed protocols such as PCIe, DDR4 and USB-C is required.

  OrCAD Capture CIS, Cadence Allegro, LTSpice, oscilloscope, VNA, signal generator

• 1mo

  ASIC Physical Design, Sr Staff Engineer - 16724

  Nepean, ON

  S

  Synopsys

  9+ YOECandidates need 9+ years of ASIC physical design experience on complex SoC or test chip projects at advanced nodes. They must know the full physical design flow and tools such as Design Compiler, PrimeTime, IC Compiler II, Calibre and RedHawk, and must be authorized to work in the USA.

  Design Compiler, PrimeTime, IC Compiler II, ICV, Calibre, RedHawk

  1mo

  ASIC Digital Design, Architect

  Markham, ON

  S

  Synopsys

  10+ YOECandidates need a master's degree or equivalent experience and 10+ years of digital ASIC design, ideally in high-speed or mixed-signal work. They need strong Verilog or VHDL skills, clock domain crossing knowledge, synthesis and DFT experience, and experience working with verification teams.

  Verilog, VHDL, synthesis tools, DFT tools

  1mo

  Principal Digital Verification Engineer

  Nepean, ON

  S

  Synopsys

  12+ YOESynopsys candidates need 12+ years of verification experience with a BSc, 10+ years with an MSc, or 8+ years with a PhD. They need deep SystemVerilog and UVM skills, simulation and waveform debugging, C knowledge, assertion-based verification, and Linux scripting. Experience with LPDDR5/5X or LPDDR6 and emulation platforms is a plus.

  SystemVerilog, UVM, waveform debugger, Linux, source control, emulation platform

  1mo

  ASIC Digital Verification, Sr. Manager

  Mississauga, ON

  S

  Synopsys

  15+ YOECandidates need a BS or MS in EE, EC or VLSI with 15+ years of IP or SoC verification experience, and strong team leadership. They must know Verilog, SystemVerilog and UVM, and Perl or Python automation. PCIe and Ethernet knowledge is an asset.

  Verilog, SystemVerilog, UVM, Perl, Python

• 1mo

  DFT Engineer, Principal

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  8+ YOECandidates need 10+ years of SoC experience in RTL, DFT or front-end roles, and extensive use of Siemens, Synopsys and Cadence DFT tools. Strong Verilog, VHDL and SystemVerilog skills, knowledge of JTAG, iJTAG and BIST standards, and TCL or Python scripting are expected.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

  1mo

  DFT Engineer (Senior to Staff level)

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  10+ YOECandidates need a bachelor's degree in an engineering or computer science field and 10+ years of SoC design experience in RTL, DFT or front-end work. They need strong knowledge of DFT tools, Verilog, VHDL and SystemVerilog, and standards such as JTAG, iJTAG and BIST.

  Siemens DFT tools, Cadence DFT tools, Verilog, VHDL, SystemVerilog, TCL

9 companies