“PCIe IP” jobs in Canada – Page 3

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• 1mo

  Project Engineering Management, Principal Engineer - 18617

  Mississauga, ON

  S

  Synopsys

  8+ YOECandidates need an engineering or applied science degree (or equivalent) and 8+ years of semiconductor experience. Strong project management skills, customer communication experience, and knowledge of SOC, ASIC, Silicon IP, PCIe and Ethernet are expected.

  Linux

  1mo

  ASIC Digital Design, Principal Engineer-18731

  Mississauga, ON

  S

  Synopsys

  Candidates need extensive mixed-signal ASIC or IP verification experience, strong PCIe and PCIe PHY knowledge, and hands-on SystemVerilog and UVM skills. Strong debugging and mentoring abilities are also required.

  SystemVerilog, UVM

  1mo

  Principal SerDes Architect

  Mississauga, ON

  S

  Synopsys

  10+ YOECandidates need 10+ years in high-speed analog, SerDes or optical communications, with knowledge of IEEE 802.3, OIF and PCIe optical specifications. A BS or MS in Electrical Engineering, Physics or a related field is required, and a PhD is preferred.

  ICT system integration, Troubleshooting, Regulatory compliance, Optical components, Photonics, Documentation

  1mo

  ASIC Digital Verification, Sr. Manager

  Mississauga, ON

  S

  Synopsys

  15+ YOECandidates need a BS or MS in EE, EC or VLSI with 15+ years of IP or SoC verification experience, and strong team leadership. They must know Verilog, SystemVerilog and UVM, and Perl or Python automation. PCIe and Ethernet knowledge is an asset.

  Verilog, SystemVerilog, UVM, Perl, Python

• 1mo

  Design Verification Engineer, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  4+ YOECandidates need a bachelor's degree in electrical engineering or a related field and at least 4 years of design verification experience using constrained-random simulation such as UVM. Strong debugging skills across IP, SoC and full-system levels are required.

  UVM, Python, Perl, C++

  1mo

  Design Verification Engineer - technical lead, Annapurna Labs

  Toronto, ON

  Full Time

  AD

  Amazon Development Centre Canada ULC

  8+ YOECandidates need a bachelor's degree in electrical engineering or a related field and 8+ years of constrained-random verification experience (such as UVM), including testbench development. Experience across IP, SoC and full-system verification, plus formal, emulation or scripting skills, is highly desired.

  UVM, formal verification tools, emulation platforms, Python, Perl

• 1mo

  Firmware Engineer, Principal

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  8+ YOECandidates need an engineering or computer science degree plus 8+ years of software engineering experience, or a master's with 7+ years. They also need 4+ years coding in C, C++, Java or Python, strong embedded firmware and lab debug skills, and team leadership experience.

  Git, Python, RISC-V

  1mo

  Software Engineer, Senior

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  2+ YOECandidates need a Bachelor's degree in an engineering or computer field with 2+ years of software experience, or a Master's with 1+ year, or a PhD. They need 2+ years of programming experience in languages such as C, C++, Java or Python, plus knowledge of Linux, CI/CD, testing and basic networking.

  JavaScript, React, Python, C++, MongoDB, GitLab

  1mo

  Digital Design Verification Engineer, Staff

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  4+ YOECandidates need a bachelor's degree in a science or engineering field with 4+ years of ASIC design or verification experience, or an equivalent master's or PhD with less experience. Strong SystemVerilog, UVM and scripting skills and proven leadership and communication are required.

  Verilog, SystemVerilog, UVM, Python, Perl, C/C++

  1mo

  Firmware Engineer – SerDes PHY (all levels)

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  6+ YOECandidates need an engineering or computer science degree and 4 to 6+ years of software engineering experience, depending on degree level. They also need at least 3 years of programming experience in languages such as C, C++, Java or Python.

  JTAG debuggers, git, Verilog, SystemVerilog

  1mo

  Connectivity Project Engineer, Principal

  Toronto, ON

  On-site

  

  Qualcomm Canada ULC

  8+ YOE5+ MgmtCandidates need a university degree in science or engineering and 6 to 8+ years of ASIC design or validation experience, depending on degree level. They also need more than 5 years in technical leadership, experience with high-performance SoCs and SerDes, and strong communication skills.

  Teamwork, Design hardware, Firmware, Regulatory compliance, Communication skills, Decision making

• 1mo

  Senior ASIC RTL Design Engineer, AI Networking IP

  Ottawa, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's in computer or electrical engineering, and strong Verilog or SystemVerilog RTL design skills. Experience delivering ASIC or FPGA products, plus networking or high-speed interface knowledge, is preferred.

  Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python

  1mo

  Verification Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need strong SystemVerilog and UVM skills, solid ASIC/SoC verification experience, and familiarity with constrained-random, coverage-driven and formal (SVA) methods. A bachelor's or master's in computer or electrical engineering is required.

  Synopsys VCS, Cadence IES, Cadence IEV, Jasper, VC-Formal, Magellan

  1mo

  Silicon Design Verification Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need a Bachelor's or Master's in Computer or Electrical Engineering, plus knowledge of digital logic and computer architecture. Experience with SystemVerilog, UVM, C++ and Python, and protocols such as PCIe or AXI, is preferred.

  UVM, C++, Python, SVA formal tools

  1mo

  Silicon Design Engineer - Technical Lead

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Advanced Micro Devices needs candidates with experience in I/O protocols such as USB, PCIe and CXL, plus micro-architecture and RTL design for high-speed, low-power digital blocks. A master's or bachelor's degree in electrical engineering or equivalent is preferred.

  Python, Perl

  1mo

  RTL Design Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need experience with I/O protocols such as USB, PCIe and CXL, plus RTL design for multi-clock, high-frequency, low-power designs. Strong analytical, communication and teamwork skills are expected, along with scripting in Python or Perl.

  RTL, DFT, Firmware, Analytical skills, Problem solving, Attention to detail

  1mo

  Senior Firmware Engineer

  Markham, ON

  Full Time

  AM

  Advanced Micro Devices, Inc

  Candidates need extensive embedded firmware experience with microcontrollers and C or assembly, plus a bachelor's or master's degree in an engineering or applied science field. Experience with RTOS, Python, Git, Agile and pre-silicon environments is preferred.

  Git, GitHub Actions

• 1mo

  Senior I/O Chiplet Verification Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10 or more years of hands-on ASIC verification experience through tape-out sign-off, strong SystemVerilog and UVM skills, and experience with high-speed interfaces or die-to-die interconnect. Scripting, regression automation and clear written communication are essential.

  SystemVerilog, UVM, UPF

  1mo

  Senior I/O Chiplet RTL Design Engineer

  Ottawa, ON

  Full Time

  

  BTA Design Services: specializes in ASIC and FPGA design and verification services, custom IP development, embedded software, and DevOps capabilities creation.

  10+ YOECandidates need 10+ years of hands-on ASIC RTL design with tape-out ownership, strong SystemVerilog and Verilog skills, and experience with high-speed interfaces such as PCIe, Ethernet or die-to-die links. They also need synthesis, timing constraint and CDC/RDC expertise, plus scripting in Python or Tcl.

  SystemVerilog, Verilog, Python, Tcl

• 1mo

  Senior Hardware Engineer

  Burnaby, BC

  $108k–$153k/yrFull Time

  

  LMI Technologies

  5+ YOECandidates need a bachelor's degree in electrical engineering and at least five years designing and testing digital logic such as FPGAs or ASICs. Hands-on experience with VHDL or Verilog, high-speed interfaces and self-verifying simulation environments is required.

  Vivado, Chipscope, Logic analyzers, Oscilloscopes, Xilinx IP, Intel FPGA

• 1mo

  FPGA Design Engineer

  Burlington, ON

  $70k–$100k/yrFull Time

  EM

  Evertz Microsystems Limited: Evertz Microsystems (TSX:ET) is a leading global manufacturer of broadcast equipment and solutions that deliver content to television sets,…

  1+ YOECandidates need a bachelor's degree in electrical or computer engineering, 1 to 5 years of FPGA design experience, and HDL skills in VHDL, Verilog, or SystemVerilog. Hands-on lab debugging, simulation, and familiarity with Vivado or Quartus are also required.

  Xilinx Vivado, Intel Quartus, Oscilloscopes, Waveform monitors, Git

• 1mo

  SMTS Logic Design

  Montréal, QC

  

  Rambus: As an industry pioneer with over 30 years experience, Rambus is a premier provider of chips & silicon IP.

  8+ YOECandidates need a BS, MS or PhD in electrical or computer engineering, 8+ years of ASIC/SoC logic design experience, and expert SystemVerilog skills. Experience with synthesis, timing closure and PCIe Gen5/Gen6/Gen7 is preferred.

  SystemVerilog, Synopsys Design Compiler, Synopsys Fusion Compiler, Cadence Genus, SpyGlass, Questa

• 1mo

  Embedded SW Developer - Synchronization and Timing

  Ottawa, ON

  On-siteFull Time

  N

  Nokia

  2+ YOENokia needs candidates with a bachelor's degree in computer or software engineering or a related field and 2-5 years of industry experience. They need strong C/C++ systems programming, knowledge of network timing protocols such as SyncE, PTP, NTP and GNSS, and experience with Linux and real-time systems.

  C, C++, Linux, FPGA, CPLD, PCIe

• 1mo

  SOC Development Engineer

  Vancouver, BC

  $134k–$201k/yrOn-siteFull Time

  

  Solidigm: Solidigm is a leading global provider of innovative NAND flash memory solutions.

  10+ YOECandidates need a bachelor's degree in electrical or computer engineering or computer science, strong debugging skills, digital logic design experience in advanced technology nodes, and verification experience with UVM or FPV. Preferred candidates have 10+ years of ASIC/SoC experience and familiarity with NVMe, PCIe, DDR or ARM standards.

  Verilog, VHDL, SystemVerilog, UVM, Jira, Confluence

10 companies